PFS172 datasheet(89/92 Pages) PADAUK

89 / 92 page

PFS172

8bit MTP MCU with 8-bit ADC

Page 89 of 92

PDK-DS-PFS172-EN_V000-May 8, 2020

9.2.5. TIMER time out

When select $ INTEGS

BIT_R (default value) and T16M counter BIT8 to generate interrupt, if T16M counts

from 0, the first interrupt will occur when the counter reaches to 0x100 (BIT8 from 0 to 1) and the second

interrupt will occur when the counter reaches 0x300 (BIT8 from 0 to 1). Therefore, selecting BIT8 as 1 to

generate interrupt means that the interrupt occurs every 512 counts. Please notice that if T16M counter is

restarted, the next interrupt will occur once Bit8 turns from 0 to 1.

If select $ INTEGS

BIT_F(BIT triggers from 1 to 0) and T16M counter BIT8 to generate interrupt, the T16M

counter changes to an interrupt every 0x200/0x400/0x600/. Please pay attention to two differences with

setting INTEGS methods.

9.2.6.

IHRC

(1) The IHRC frequency calibration is performed when IC is programmed by the writer.

(2) Because the characteristic of the Epoxy Molding Compound (EMC) would some degrees affects the

IHRC frequency (either for package or COB), if the calibration is done before molding process, the actual

IHRC frequency after molding may be deviated or becomes out of spec. Normally , the frequency is

getting slower a bit.

(3) It usually happens in COB package or Quick Turnover Programming (QTP). And PADAUK would not

take any responsibility for this situation.

(4) Users can make some compensatory adjustments according to their own experiences. For example,

users can set IHRC frequency to be 0.5% ~ 1% higher and aim to get better re-targeting after molding.

9.2.7.

LVR

User can set MISC.2 as “1” to disable LVR. However, VDD must be kept as exceeding the lowest working

voltage of chip; Otherwise IC may work abnormally.

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