MAX15014 datasheet(21/25 Pages) MAXIM

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The error-amplifier gain between fP2 and fP3 is approxi-

mately equal to R5/(R6 || R3).

The ESR zero frequency (fZESR) might not be very much

higher than the double-pole frequency fLC; therefore, the

value of R5 can be calculated as:

MOD_DC

R3 R6

R3 R6 Gf

C7 can still be calculated as:

0.5 2

R5 f

× π×

fP3 is set at 5xfC. Therefore, C8 is calculated as:

C7 R5 f

π×

−

Setting the LDO Linear Regulator

Output Voltage

The MAX15014–MAX15017 LDO regulator features Dual

Mode™ operation: it can operate in either a preset volt-

age mode or an adjustable mode. In preset-voltage mode,

internal trimmed feedback resistors set the internal linear

regulator to 3.3V or 5V (see the Selector Guide). Select

preset-voltage mode by connecting SET_LDO to ground.

In adjustable mode, select an output voltage between

1.5V and 11V using two external resistors connected as

a voltage-divider to SET_LDO (see Figure 5). Set the

output voltage using the following equation:

OUT

SET_LDO







where VSET_LDO = 1.241V and the recommended value

for R2 is around 50kΩ.

Setting the RESET Timeout Delay

The RESET timeout period is adjustable to accommodate

a variety of μP applications. Adjust the RESET timeout

period by connecting a capacitor (CCT) between CT and

SGND.

CT TH

CT THQ

where VCT-TH = delay-comparator threshold (rising) =

1.241V (typ), ICT-THQ = CT charge current = 2 x 10-6A

(typ), tRP is in seconds and CCT is in Farads.

Connect CT to LDO_OUT to select the internally

fixed timeout period. CCT must be a low-leakage-type

capacitor. Ceramic capacitors are recommended; do not

use capacitors lower than 200pF to avoid the influence of

parasitic capacitances.

Capacitor Selection and Regulator Stability

For stable operation over the full temperature range and

with load currents up to 50mA, use a 10μF (min) output

capacitor (CLDO_OUT) with a maximum ESR of 0.4Ω.

To reduce noise and improve load-transient response,

stability, and power-supply rejection, use larger output

capacitor values. Some ceramic dielectrics such as

Z5U and Y5V exhibit very large capacitance and ESR

variation with temperature and are not recommended.

With X7R or X5R dielectrics, 15μF should be sufficient for

operation over their rated temperature range. For higher

ESR tantalum capacitors (up to 1Ω), use 22μF or more

to maintain stability. To improve power-supply rejection

and transient response, use a minimum 0.1μF capacitor

between IN_LDO and SGND.

Power Dissipation

The MAX15014–MAX15017 are available in a thermally

enhanced package and can dissipate up to 2.86W at TA

= +70°C. When the die temperature reaches +160°C,

the part shuts down and is allowed to cool. After the die

cools by 20°C, the device restarts with a soft-start. The

power dissipated in the device is the sum of the power

dissipated in the LDO, power dissipated from supply

current (PQ), transition losses due to switching the

internal power MOSFET (PSW), and the power

Dual Mode is a trademark of Maxim Integrated Products, Inc.

Figure 5. Setting the Output Voltage Using a Resistive Divider

MAX15014–

MAX15017

LDO_OUT

SET_LDO

SGND

IN_LDO

VIN_LDO

MAX15014–MAX15017

1A, 4.5V to 40V Input Buck Converters with

50mA Auxiliary LDO Regulators

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