MAX15014 datasheet(14/25 Pages) MAXIM

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Detailed Description

The MAX15014–MAX15017 combine a voltage-mode

buck converter with an internal 0.5Ω power-MOSFET

switch and a low-quiescent-current LDO regulator. The

buck converter of the MAX15015/MAX15016 has a wide

input voltage range of 4.5V to 40V. The MAX15014/

MAX15017’s input voltage range is 7.5V to 40V. Fixed

switching frequencies of 135kHz and 500kHz are avail-

able. The internal low RDS_ON switch allows for up to 1A

of output current, and the output voltage can be adjusted

from 1.26V to 32V. External compensation and volt-

age feed-forward simplify loop-compensation design and

allow for a wide variety of L and C filter components. All

devices offer an automatic switchover to pulse-skipping

(PFM) mode, providing low-quiescent current and high

efficiency at light loads. Under no load, PFM mode opera-

tion reduces the current consumption to 5.6mA for the

MAX15014/MAX15017 and 8.6mA for the MAX15015/

MAX15016. In shutdown (DC-DC and LDO regulator off),

the supply current falls to 6μA. Additional features include

a programmable soft-start, cycle-by-cycle current limit,

hiccup-mode output short-circuit protection, and thermal

shutdown.

The LDO linear regulator operates from 5V to 40V and

delivers a guaranteed 50mA load current. The devices

feature a preset output voltage of 5.0V (MAX1501_A) or

3.3V (MAX1501_B). Alternatively, the output voltage can

be adjusted from 1.5V to 11V using an external resistive

divider. The LDO section also features a RESET output

with adjustable timeout period.

Enable Inputs and UVLO

The MAX15014–MAX15017 feature two logic inputs,

EN_SW (active-high) and EN_SYS (active-high) that

can be used to enable the switching power supply and

the LDO_OUT outputs. When VEN_SW is higher than

the threshold and EN_SYS is high, the switching power

supply is enabled. When EN_SYS is high, the LDO is

Figure 1. MAX15015/MAX15016 Simplified Block Diagram

MAX15015

MAX15016

PASS ELEMENT

DELAY COMPARATOR

VREF

REF_ILIM

VREF

TSD

VREF

ISS

PREREG

SHDN

LEVEL

SHIFT

REG_LDO

HIGH-SIDE

CURRENT

SENSE

DVREG

LOGIC

OVERLOAD

MANAGEMENT

THERMAL

SHDN

MUX

VINT

RAMP

IN S/W

REF_PFM

CLK

OVERL

LDO_OUT

SET_LOD

DRAIN

BST

RESET

185mV

PGND

VINT

PCLK

VREF

VINTOK

VREG_EN

UVLO_LDO

UVLO_SW

ENABLE LDO

0.925 x VREF

VREG_ OK

PFM

VREG_OK

VINT

IN_LDO

VINT

UVLO_LDO

TSD

SHDN

UVLO_SW

TSD

SHDN

VREF

OUT_LDO

EN_SYS

IN_SW

IN_LDO

PCLK

SCLK

DVREG

SSA

E/A

0.3V

CLK

CPWM

OSC

VREFOK

4.1V

VINTOK

VREFOK

7.0V OR 4.1V

VINTOK

REF

VINT

VREFOK

DVREG

C+

C-

REG

EN_SW

COMP

SYNC

SGND

MAX15014–MAX15017

1A, 4.5V to 40V Input Buck Converters with

50mA Auxiliary LDO Regulators

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