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MAX15014 bảng dữ liệu(PDF) 15 Page - Maxim Integrated Products |
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MAX15014 bảng dữ liệu(HTML) 15 Page - Maxim Integrated Products |
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15 / 25 page ![]() active. When EN_SYS is low, the entire chip is off (see Table 1). The MAX15014–MAX15017 provide undervoltage lockout (UVLO). The UVLO monitors the input voltage (VIN_LDO) and is fixed at 4.1V (MAX15015/MAX15016) or 7V (MAX15014/MAX15017). Internal Linear Regulator (REG) REG is the output terminal of a 5V (MAX15015/ MAX15016), or 8V (MAX15014/MAX15017) LDO that is powered from IN_SW and provides power to the IC. Connect REG externally to DVREG to provide power for the high-side MOSFET gate driver. Bypass REG to SGND with a ceramic capacitor (CREG) of at least 1μF. Place the Figure 2. MAX15014/MAX15017 Simplified Block Diagram Table 1. Enable Inputs Configuration EN_SYS EN_SW LDO REGULATOR DC-DC SWITCHING CONVERTER Low Low Off Off Low High Off Off High Low On Off High High On On MAX15014 MAX15017 PASS ELEMENT DELAY COMPARATOR VREF REF_ILIM VREF TSD VREF ISS PREREG SHDN REG_LDO HIGH-SIDE CURRENT SENSE DVREG LOGIC OVERLOAD MANAGEMENT THERMAL SHDN MUX VINT RAMP IN S/W + - + - + - REF_PFM CLK OVERL + - LDO_OUT SET_LOD CT DRAIN BST LX RESET 185mV PGND VINT VREF VINTOK VREG_EN UVLO_LDO UVLO_SW ENABLE LDO 0.925 x VREF VREG_ OK PFM EN PFM VREG_OK VINT VINT VINT VINT - + VINT IN_LDO VINT - + UVLO_LDO TSD SHDN UVLO_SW TSD SHDN VREF 2A OUT_LDO - + EN_SYS IN_SW IN_LDO PCLK SCLK SSA + - E/A + - - + + 0.3V CLK - CPWM EN OSC VREFOK 4.1V VINTOK VREFOK 7.0V OR 4.1V VINTOK REF VINT VREFOK REG EN_SW SS FB COMP SYNC SGND ILIM MAX15014–MAX15017 1A, 4.5V to 40V Input Buck Converters with 50mA Auxiliary LDO Regulators www.maximintegrated.com Maxim Integrated │ 15 |
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