Z86C34 datasheet(50/70 Pages) ZILOG

50 / 70 page

Z86C34/C35/C36/C44/C45/C46

CMOS Z8® MCUs with ASCI UART

ZiLOG

P R E L I M I N A R Y

DS007601-Z8X0499

ASCI CONTROL REGISTER B (CNTLB)

(%(A)04H: READ/WRITE)

BIT 7 is the Multiprocessor Bit Transmit

When multiprocessor format is selected (MP BIT = 1), Mul-

tiprocessor Bit Transmit (MPBT) is used to specify the MPB

data bit for transmission. If MPBT = 1, then a 1 is transmitted

in the MPB bit position. If MPBT = 0, a 0 is transmitted.

BIT 6 is the Multiprocessor Mode

When Multiprocessor Mode (MP) is set to 1, the serial data

format is configured for multiprocessor mode, adding a bit

position whose value is specified in MPBT immediately af-

ter the specified number of data bits and preceding the spec-

ified number of STOP bits.

Note: The multiprocessor format does not provide parity. The

serial data format while in MP mode is illustrated in Fig-

ure 35.

If MP = 0, the data format is based on MOD2–0 in CNTLA

and may include parity.

Bit 5 is the BRG Prescaler

The Prescale bit specifies the baud rate generator prescale

factor when using the SS2–0 bits to define the ASCI baud

rate (BRG MODE = 0). Writing a 0 to this bit sets the BRG

Prescaler to divide by 10. Setting this bit to a 1 sets the BRG

Prescaler to divide by 30. See the Baud Rate Generation

Summary for more information on setting the ASCI baud

rate.

Bit 4 is the Parity Even/Odd

Parity Even/Odd (PEO) controls the parity bit transmitted

on the serial output and the parity check on the serial input.

If PEO is cleared to 0, even parity is transmitted and checked

If PEO is set to 1, odd parity is transmitted and checked.

Bit 3 is the Divide Ratio

The Divide Ratio bit specifies the divider used to obtain the

baud rate from the data sampling clock when using the

SS2–0

bits to define the ASCI baud rate (BRG MODE = 0).

If DR is 0, then DIVIDE-BY-16 is used. If DR is set to a 1,

then DIVIDE-BY-64 is used. See the Baud Rate Generation

Summary for more information on setting the ASCI baud

rate.

Table 21. CNTLB Register Bit Functions

Bit

Multiprocessor

Bit

Transmitter

(MPBT)

Multiprocessor

Mode

(MP)

Parity

Even/Odd

(PEO)

Divide Ratio

(DR)

SS2

SS1

SS0

Prescale

(PR)

Clock Source

and Speed

Reset

Figure 35. MP Mode Serial Data Format

7 or 8 bits Data Field

Start Bit

MPB

1 or 2

Stop Bit(s)

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