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Z86C34 bảng dữ liệu(PDF) 43 Page - Zilog, Inc. |
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Z86C34 bảng dữ liệu(HTML) 43 Page - Zilog, Inc. |
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43 / 70 page ![]() Z86C34/C35/C36/C44/C45/C46 ZiLOG CMOS Z8® MCUs with ASCI UART DS007601-Z8X0499 P R E L I M I N A R Y 43 Low Voltage Protection. An onboard Voltage Compara- tor checks that VCC is at the required level to ensure correct operation of the device. RESET is globally driven if VCC is below the specified voltage (Low Voltage Protection). The minimum operating voltage is varying with the temperature and operating frequency, while the Low Voltage Protection (VLV) varies with temperature only. The Low Voltage Protection trip voltage (VLV) is less than 3V and more than 1.4V under the following conditions. Note: The internal clock frequency relationship to the XTAL clock is dependent on SMR BIT 0 1 setting. The device functions normally at or above 3.0V under all conditions. Below 3.0V, the device functions normally until the Low Voltage Protection trip point (VLV) is reached, for the temperatures and operating frequencies in Case 1 and Case 2, above. The device is guaranteed to function normally at supply voltages above the Low Voltage Protection trip point. The actual Low Voltage Protection trip point is a func- tion of temperature and process parameters (Figure 36). Figure 30. Resets and WDT CLK 18 Clock RESET Generator RESET Clear WDT TAP SELECT Internal RC OSC. CK CLR 5ms POR 5ms 15ms 25ms 100ms 2V Operating Voltage Det. Internal RESET WDT Select (WDTMR) CLK Source Select (WDTMR) XTAL V V From Stop Mode Recovery Source WDT Stop Delay Select (SMR) + – 4 Clock Filter WDT/POR Counter Chain M U X Reset DD LV Table 16. Maximum (VLV) Conditions: Case 1: TA = –40ºC, +105ºC, Internal Clock Frequency equal or less than 4 MHz Case 2: TA = –40ºC, +85ºC, Internal Clock Frequency equal or less than 6 MHz |
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