DSP56857 datasheet(397/662 Pages) FREESCALE

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Time-Of-Day (TOD), Rev. 4

Freescale Semiconductor

14-11

14.6.3 Time-of-Day Clock Scaler (TODCSL)

Figure 14-4. TOD Clock Scaler (TODCSL)

See Programmer’s Sheet on Appendix page B - 96

14.6.3.1 Time-of-Day Clock Scaler (TODCSL)—Bits 15-0

Setting this field to X divides the TOD Input Clock frequency by X + 1 to produce the time-base

clock used for incrementing the counters. The clock generation system and this scaler must be

configured so the time-base clock is precisely 1Hz for correct operation of the TOD module as

the seconds counter increments with each time-base clock.

This register is always readable. It accepts writing only when TODEN = 0.

14.6.4 Time-of-Day Seconds Counter (TODSEC)

Figure 14-5. TOD Seconds Register (TODSEC)

See Programmer’s Sheet on Appendix page B - 97

14.6.4.1 Reserved—Bits 15–6

These bits are reserved or not implemented. They cannot be read nor modified by writing.

14.6.4.2 Time-of-Day Seconds (TODSEC)—Bits 5–0

When TODEN is set, this register is continuously updated to contain the current seconds counter

value. The value of the counter can be read through the seconds register, but it cannot be

modified. When TODEN is cleared, TOD counting is disabled. This register can then be read or

written. When TODEN is set to one again, the counting resumes from the current register value.

Base + $1

Read

TIME-OF-DAY CLOCK SCALER

Write

Reset

000

Base + $2

Read

TODSEC

Write

Reset

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