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56F8014 bảng dữ liệu(PDF) 48 Page - Freescale Semiconductor, Inc |
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56F8014 bảng dữ liệu(HTML) 48 Page - Freescale Semiconductor, Inc |
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48 / 124 page ![]() 56F8014 Technical Data, Rev. 3 48 Freescale Semiconductor Preliminary 5.6.1.5 EOnCE Trace Buffer Interrupt Priority Level (TRBUF IPL)— Bits 5–4 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 1 • 10 = IRQ is priority level 2 • 11 = IRQ is priority level 3 5.6.1.6 EOnCE Breakpoint Unit Interrupt Priority Level (BKPT_U IPL)— Bits 3–2 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 1 • 10 = IRQ is priority level 2 • 11 = IRQ is priority level 3 5.6.1.7 EOnCE Step Counter Interrupt Priority Level (STPCNT IPL)— Bits 1–0 This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3. It is disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 1 • 10 = IRQ is priority level 2 • 11 = IRQ is priority level 3 5.6.2 Interrupt Priority Register 1 (IPR1) Figure 5-4 Interrupt Priority Register 1 (IPR1) Base + $1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read GPIOB IPL GPIOC IPL GPIOD IPL 0 0 FM_CBE IPL FM_CC IPL FM_ERR IPL PLL IPL Write RESET 0 000 000 0 0 0 0 0 0 0 0 0 |
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