56F8014 datasheet(45/124 Pages) FREESCALE

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56F8014 Technical Data, Rev. 3

Freescale Semiconductor

Preliminary

5.6 Register Descriptions

A register address is the sum of a base address and an address offset. The base address is defined at the

system level and the address offset is defined at the module level. The ITCN module has 16 registers.

Table 5-2 ITCN Register Summary

(ITCN_BASE = $00 F060)

Acronym

Base Address +

Section Location

IPR0

Interrupt Priority Register 0

5.6.1

IPR1

Interrupt Priority Register 1

5.6.2

IPR2

Interrupt Priority Register 2

5.6.3

IPR3

Interrupt Priority Register 3

5.6.4

IPR4

Interrupt Priority Register 4

5.6.5

VBA

Vector Base Address Register

5.6.6

FIM0

Fast Interrupt Match 0 Register

5.6.7

FIVAL0

Fast Interrupt 0 Vector Address Low Register

5.6.8

FIVAH0

Fast Interrupt 0 Vector Address High Register

5.6.9

FIM1

Fast Interrupt Match 1 Register

5.6.10

FIVAL1

Fast Interrupt 1 Vector Address Low Register

5.6.11

FIVAH1

Fast Interrupt 1 Vector Address High Register

5.6.12

IRQP0

IRQ Pending Register 0

5.6.13

IRQP1

IRQ Pending Register 1

5.6.14

IRQP2

IRQ Pending Register 2

5.6.15

Reserved

ICTRL

$12

Interrupt Control Register

5.6.16

Reserved

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