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HT67F5652 bảng dữ liệu(PDF) 121 Page - Holtek Semiconductor Inc |
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HT67F5652 bảng dữ liệu(HTML) 121 Page - Holtek Semiconductor Inc |
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121 / 224 page  Rev. 1.00 1�0 De�e��e� 0�� �01� Rev. 1.00 1�1 De�e��e� 0�� �01� HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU HT67F5652 24-Bit Delta Sigma A/D + LCD Flash MCU A/D Data Rate Definition TheDeltaSigmaA/Dconverterdataratecanbecalculatedusingthefollowingequation: OSR CHOP N f OSR CHOP /N f OSR CHOP f Rate Data MCLK MCLK ADCK fADCK:A/Dclockinput,derivedfromfMCLK/N fMCLK:A/Dclocksource,derivedfromfSYSorfSYS/2/(ADCK+1)usingtheADCKbitfield. N:aconstantdividedfactorthatcanbeequalto30or12determinedbytheFLMSbitfield. CHOP:Samplingdataamountdoublingfunctioncontrolandcanbeequalto2or1determinedby theFLMSbitfield. OSR:OversamplingratedeterminedbytheADORfield. Forexample,ifadatarateof10Hzisdesired,anfMCLKclocksourcewithafrequencyof4.9152MHz A/Dconvertercanbeselected.ThensettheFLMSfieldto"000"toobtainan"N"equalto30and "CHOP"equalto2.Finally,settheADORfieldto"001"toselectanoversamplingrateequalto 8192.Therefore,theDataRate=4.9152MHz/(30×2×8192)=10Hz. NotethattheA/DconverterhasanotchrejectionfunctionforanA/Cpowersupplywithafrequency of50Hzor60Hzwhenthedatarateisequalto10Hz. A/D Converter Register Description OveralloperationoftheA/Dconverteriscontrolledbyusingaseriesofregisters.Threereadonly registersexisttostoretheA/Dconverterdata24-bitvalue.AcontrolregisternamedasPWRCis usedtocontroltherequiredbiasandsupplyvoltagesforPGAandA/Dconverterandisdescribed inthe"InternalPowerSupply"section.ThreeregistersareusedforoverallcontroloftheD/A converter.TherearetworegistersforoverallOPAoperation.Theremaining6registersarecontrol registerswhichsetupthegainselectionsandcontrolfunctionsoftheA/Dconverter. Register Name Bit 7 6 5 4 3 2 1 0 PWRC LDOEN — — — — LDOBPS LDOVS1 LDOVS0 PGAC0 — VGS1 VGS0 AGS1 AGS0 PGS� PGS1 PGS0 PGAC1 — INIS INX1 INX0 DCSET� DCSET1 DCSET0 — PGACS — — CHSN� CHSN1 CHSN0 CHSP� CHSP1 CHSP0 ADRL D� D� D5 D4 D3 D� D1 D0 ADRM D15 D14 D13 D1� D11 D10 D9 D8 ADRH D�3 D�� D�1 D�0 D19 D18 D1� D1� ADCR0 ADRST ADSLP ADOFF ADOR� ADOR1 ADOR0 — VREFS ADCR1 FLMS� FLMS1 FLMS0 VRBUFN VRBUFP ADCDL EOC — ADCS — — — ADCK4 ADCK3 ADCK� ADCK1 ADCK0 DSDAH D11 D10 D9 D8 D� D� D5 D4 DSDAL — — — — D3 D� D1 D0 DSDACC DSDACEN DSDACVRS — — — — — — DSOPC DSOPEN — — — OPN1 OPN0 OPP1 OPP0 A/D Converter Register List |
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