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TMS320DM6431 bảng dữ liệu(PDF) 118 Page - Texas Instruments |
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TMS320DM6431 bảng dữ liệu(HTML) 118 Page - Texas Instruments |
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118 / 227 page ![]() 5.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating TMS320DM6431 Digital Media Processor SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Temperature (Unless Otherwise Noted) PARAMETER TEST CONDITIONS (1) MIN TYP MAX UNIT High-level output voltage (3.3V I/O except VOH DVDD33 = MIN, IOH = MAX 2.4 V I2C pins) Low-level output voltage (3.3V I/O except DVDD33 = MIN, IOL = MAX 0.4 V 2C pins) VOL Low-level output voltage (3.3V I/O I2C pins) IO = 3 mA 0 0.4 V VI = VSS to DVDD33 with internal pullup 50 100 250 µA resistor (3) Input current [DC] (except I2C capable pins) II (2) VI = VSS to DVDD33 with internal pulldown –250 –100 –50 µA resistor (3) Input current [DC] (I2C) VI = VSS to DVDD33 ±10 µA CLK_OUT0/PWM2/GPIO[84] and GP[57] -8 mA IOH High-level output current [DC] DDR2 –13.4 mA All other peripherals -4 mA CLK_OUT0/PWM2/GPIO[84] and GP[57] 8 mA IOL Low-level output current [DC] DDR2 13.4 mA All other peripherals 4 mA VO = DVDD33 or VSS; internal pull disabled 50 µA IOZ (4) I/O Off-state output current VO = DVDD33 or VSS; internal pull enabled ±100 µA CVDD = 1.2 V, DSP clock = 300 MHz 325 mA ICDD Core (CVDD) supply current (5) CVDD = 1.05 V, DSP clock = 300 MHz 278 mA IDDD 3.3V I/O (DVDD33) supply current (5) DVDD = 3.3 V, DSP clock = 300 MHz 13 mA DVDD = 1.8 V, CVDD = 1.2 V, DSP clock = 90 mA 300 MHz 1.8V I/O (DVDDR2, DDR_VDDDLL, IDDD PLLVPRW18, MXVDD) supply current (5) DVDD = 1.8 V, CVDD = 1.05 V, DSP clock = 71 mA 300 MHz CI Input capacitance 5 pF Co Output capacitance 5 pF (1) For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table. (2) II applies to input-only pins and bi-directional pins. For input-only pins, II indicates the input leakage current. For bi-directional pins, II indicates the input leakage current and off-state (Hi-Z) output leakage current. (3) Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor. (4) IOZ applies to output-only pins, indicating off-state (Hi-Z) output leakage current. (5) Measured under the following conditions: 60% DSP CPU utilization doing typical activity (peripheral configurations, other housekeeping activities); DDR2 Memory Controller at 50% utilization (135 MHz), 50% writes, 32 bits, 50% bit switching; 2 MHz McBSP0 at 100% utilization and 50% switching; Timer0 at 100% utilization. At room temperature (25 C) for typical process ZWT devices. The actual current draw varies across manufacturing processes and is highly application-dependent. For more details on core and I/O activity, as well as information relevant to board power supply design, see the TMS320DM643x Power Consumption Summary Application Report (literature number SPRAAO6). 118 Device Operating Conditions Submit Documentation Feedback |
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