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TMS320DM6431 bảng dữ liệu(PDF) 117 Page - Texas Instruments |
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TMS320DM6431 bảng dữ liệu(HTML) 117 Page - Texas Instruments |
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117 / 227 page ![]() 5.2 Recommended Operating Conditions TMS320DM6431 Digital Media Processor www.ti.com SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008 MIN NOM MAX UNIT CVDD Supply voltage, Core (CVDD) (1) (-3/-3Q/-3S devices) 1.14 1.2 1.26 V Supply voltage, I/O, 3.3V (DVDD33) 2.97 3.3 3.63 V DVDD Supply voltage, I/O, 1.8V (DVDDR2, DDR_VDDDLL, PLLPWR18, 1.71 1.8 1.89 V MXVDD (2)) VSS Supply ground (VSS, DDR_VSSDLL, MXVSS (3)) 0 0 0 V DDR_VREF DDR2 reference voltage(4) 0.49DVDDR2 0.5DVDDR2 0.51DVDDR2 V DDR_ZP DDR2 impedance control, connected via 200 Ω resistor to V SS VSS V DDR_ZN DDR2 impedance control, connected via 200 Ω resistor to DV DDR2 DVDDR2 V High-level input voltage, 3.3V (except I2C pins) 2 V VIH High-level input voltage, MXI/ CLKIN 0.65MXV V High-level input voltage, I2C 0.7DVDD33 Low-level input voltage, 3.3V (except I2C pins) 0.8 V VIL Low-level input voltage, MXI/ CLKIN 0.35MXV(5) V Low-level input voltage, I2C 0 0.3DVDD33 V Commercial 0 90 C TJ Operating Junction temperature(6)(7) Automotive (Q or S suffix) –40 125 C Commercial 0 70 C TA Operating Ambient Temperature(7) Automotive (Q or S suffix) -40 85 C DSP Operating Frequency FSYSCLK1 (-3/-3Q/-3S devices) 300 MHz (SYSCLK1) (1) Future variants of TI SoC devices may operate at voltages ranging from 0.9 V to 1.4 V to provide a range of system power/performance options. TI highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.0 V, 1.05 V, 1.1 V, 1.14 V, 1.2, 1.26 V with 3% tolerances) by implementing simple board changes such as reference resistor values or input pin configuration modifications. Not incorporating a flexible supply may limit the system's ability to easily adapt to future versions of TI SoC devices. (2) Oscillator 1.8 V power supply (MXVDD) can be connected to the same 1.8 V power supply as DVDDR2. (3) Oscillator ground (MXVSS) must be kept separate from other grounds and connected directly to the crystal load capacitor ground. (4) DDR_VREF is expected to equal 0.5DVDDR2 of the transmitting device and to track variations in the DVDDR2. (5) Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed. (6) In the absence of a heat sink or direct thermal attachment on the top of the device, use the following formula to determine the device junction temperature: TJ = TC + (Power x PsiJT). Power and TC can be measured by the user. Section 7.1, Thermal Data for ZWT and Section 7.1.1, Thermal Data for ZDU provide the junction-to-package top (PSIJT) value based on airflow in the system. In the presence of a heat sink or direct thermal attachment on the top of the device, additional calculations and considerations must be taken into account. For more detailed information on thermal considerations, measurements, and calculations, see the Thermal Considerations for TMS320DM64xx, TMS320DM64x, and TMS320C6000 Devices Application Report (literature number SPRAAL9). (7) Applications must meet both the Operating Junction Temperature and Operating Ambient Temperature requirements. For more detailed information on thermal considerations, measurements, and calculations, see the Thermal Considerations for TMS320DM64xx, TMS320DM64x, and TMS320C6000 Devices Application Report (literature number SPRAAL9). Submit Documentation Feedback Device Operating Conditions 117 |
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