TMS320DM6431 datasheet(159/227 Pages) TI1

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6.9 External Memory Interface (EMIF)

6.9.1

Asynchronous EMIF (EMIFA)

6.9.2

NAND (NAND, SmartMedia, xD)

TMS320DM6431

Digital Media Processor

www.ti.com

SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008

DM6431 supports several memory and external device interfaces, including:

• Asynchronous EMIF (EMIFA) for interfacing to NOR Flash, SRAM, etc.

• NAND Flash

The DM6431 Asynchronous EMIF (EMIFA) provides an 8-bit data bus, an address bus width up to 24-bits,

and 4 chip selects, along with memory control signals. These signals are multiplexed between these

peripherals:

• EMIFA and NAND interfaces

• VPFE (CCDC)

• GPIO

The EMIFA interface provides both the asynchronous EMIF and NAND interfaces. Four chip selects are

provided and each are individually configurable to provide either EMIFA or NAND support. The NAND

features supported are as follows.

• NAND flash on up to 4 asynchronous chip selects.

• 8-bit data bus width

• Programmable cycle timings.

• Performs ECC calculation.

• NAND Mode also supports SmartMedia and xD memory cards

• Boot ROM supports booting of the DM6431 from NAND flash located at CS2

The memory map for EMIFA and NAND registers is shown in Table 6-23. For more details on the EMIFA

and NAND interfaces, see Section 2.9, Documentation Support for the link to the TMS320DM643x DMP

Peripherals

Overview

Reference

Guide

(literature

number

SPRU983)

for

the

TMS320DM643x

Asynchronous External Memory Interface (EMIF) User's Guide (literature number SPRU984).

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