STM32L100RB datasheet(14/103 Pages) STMICROELECTRONICS

14 / 103 page

Functional overview

STM32L100C6 STM32L100R8/RB

14/103

DocID024295 Rev 5

line source can be one of the 16 external lines. It can be the PVD output, the

Comparator 1 event or Comparator 2 event (if internal reference voltage is on). It can

also be wakened by the USB wakeup.

Stop mode consumption: refer to Table 21.

•

Standby mode with RTC

Standby mode is used to achieve the lowest power consumption and real time clock.

The internal voltage regulator is switched off so that the entire VCORE domain is

powered off. The PLL, MSI RC, HSI RC and HSE crystal oscillators are also switched

off. The LSE or LSI is still running. After entering Standby mode, the RAM and register

contents are lost except for registers in the Standby circuitry (wakeup logic, IWDG,

RTC, LSI, LSE Crystal 32K osc, RCC_CSR).

The device exits Standby mode in 60 µs when an external reset (NRST pin), an IWDG

reset, a rising edge on one of the two WKUP pins, RTC alarm (Alarm A or Alarm B),

RTC tamper event, RTC timestamp event or RTC Wakeup event occurs.

•

Standby mode without RTC

Standby mode is used to achieve the lowest power consumption. The internal voltage

regulator is switched off so that the entire VCORE domain is powered off. The PLL, MSI,

RC, HSI and LSI RC, HSE and LSE crystal oscillators are also switched off. After

entering Standby mode, the RAM and register contents are lost except for registers in

the Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32K osc,

RCC_CSR).

The device exits Standby mode in 60 µs when an external reset (NRST pin) or a rising

edge on one of the two WKUP pin occurs.

Standby mode consumption: refer to Table 22.

Note:

The RTC, the IWDG, and the corresponding clock sources are not stopped by entering the

Stop or Standby mode.

Table 2. Functionalities depending on the operating power supply range

Operating power

supply range

Functionalities depending on the operating power supply range

DAC and ADC

operation

USB

Dynamic voltage

scaling range

I/O operation

VDD = 1.8 to 2.0 V

Conversion time

up to 500 Ksps

Not functional

Range 2 or

Range 3

Degraded speed

performance

VDD = 2.0 to 2.4 V

Conversion time

up to 500 Ksps

Functional(1)

1. Should be USB-compliant from I/O voltage standpoint, the minimum VDD is 3.0 V.

Range 1,

Range 2 or

Range 3

Full speed operation

VDD = 2.4 to 3.6 V

Conversion time

up to 1 Msps

Functional(1)

Range 1,

Range 2 or

Range 3

Full speed operation

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