L6751C datasheet(34/57 Pages) STMICROELECTRONICS

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Output voltage monitoring and protection

L6751C

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Output voltage monitoring and protection

The L6751C monitors the regulated voltage of both sections through pin VSEN and SVSEN

in order to manage OV and UV. The device shows different thresholds when in different

operative conditions but the behavior in response to a protection event is still the same as

described below.

Protection is active also during soft-start while it is properly masked during DVID transitions

with an additional delay to avoid false triggering. OV protection is active during DVID with

threshold modified to 1.8 V unless offset has been commanded by SVI or PMBus: in this

case the fixed threshold is 2.4 V.

Table 13. L6751C protection at a glance

7.1

Overvoltage

When the voltage sensed by VSEN and/or SVSEN surpasses the OV threshold, the

controller acts in order to protect the load from excessive voltage levels avoiding any possi-

ble undershoot. To reach this target, a special sequence is performed as per the following

list:

–

The reference performs a DVID transition down to 250 mV on the section which

triggered the OV protection.

–

The PWMs of the section which triggered the protection are switched between

Hi-Z and zero (ENDRV is kept high) in order to follow the voltage imposed by the

DVID on-going. This limits the output voltage excursion, protects the load and

assures no undershoot is generated (if VOUT < 250 mV, the section is Hi-Z).

–

The PWMs of the non-involved section are set permanently to Hi-Z (ENDRV is

kept low) in order to realize a Hi-Z condition.

–

OSC/ FLT pin is driven high.

–

Power supply or EN pin cycling is required to restart operation.

If the cause of the failure is removed, the converter ends the transition with all PWMs in

Hi-Z state and the output voltage of the section which triggered the protection lower than

250 mV.

Section

Multi-phase

Single-phase

Overvoltage

(OV)

VSEN, SVSEN = +175 mV above reference.

Action: IC latch; LS = ON and PWMx = 0 (if applicable); other section: Hi-Z.

VR_READY of the latched section resets (only).

Undervoltage

(UV)

VSEN, SVSEN = 400 mV below reference. Active after Ref > 500 mV.

Action: IC latch; both sections Hi-Z. VR_READY of the latched section resets

(only).

Overcurrent (OC)

Current monitor across inductor DCR. Dual protection, per-phase and total.

Action: UV-Like. VR_READY of the latched section resets (only).

Dynamic VID

Protection masked with additional delay to prevent from false triggering.

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