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L6751C bảng dữ liệu(PDF) 25 Page - STMicroelectronics

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L6751C bảng dữ liệu(HTML) 25 Page - STMicroelectronics

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L6751C
Device configuration and pin-strapping tables
57
56
36
12 A
+20 A
1
+22 A
+22 A
1
18
13
0
0
15
12
+16 A
1
+14 A
1
18
16
0
0
15
14.7
+10 A
1
+8 A
1
10
11
0
0
18
22
+6 A
1
DPM OFF
1
56
75
0
0
10
15
8 A
+20 A
1
+14 A
+22 A
1
12
20
0
0
12
22.6
+16 A
1
+14 A
1
39
82
0
0
47
110
+10 A
1
+8 A
1
10
27
0
0
22
68
+6 A
1
DPM OFF
1
10
36
0
0
18
75
OFF
(12 A)(4)
+20 A
1
+8 A
+22 A
1
15
75
0
0
10
59
+16 A
1
+14 A
1
10
75
0
0
10
100
+10 A
1
+8 A
1
10
150
0
0
10
220
+6 A
1
DPM OFF(5)
1
10
Open
0
0
1. Suggested values, divider needs to be connected between VCC5 pin and GND.
2. Transition threshold specified as delta with respect to previous step (DPM23 is wrt DPM12).
3. GDC threshold is defined by combining GDC0 and GDC1 bits defined between the two different pin-strappings DPM1-3 and
DPM4-6. See Table 12 for details.
4. Transition between 1Phase and 2Phase operation is set to 12 A but disabled in PS00h.
5. Dynamic phase management disabled, IC always working at maximum possible number of phases except from when in
>PS00h when transitioning between 1Phase and 2Phase at 12 A.
Table 11. DPM pin-strapping(1) (continued)
Rdown [k
]Rup [k]
DPM1-3(2), (3)
DPM4-6(2), (3)
DPM12
DPM23
GDC0
DPM34
DPM46
GDC1



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