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VSC7212RG bảng dữ liệu(PDF) 22 Page - Vitesse Semiconductor Corporation

tên linh kiện VSC7212RG
Giải thích chi tiết về linh kiện  Gigabit Interconnect Chip
PDF  34 Pages
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nhà sản xuất  VITESSE [Vitesse Semiconductor Corporation]
Trang chủ  http://www.vitesse.com
Logo VITESSE - Vitesse Semiconductor Corporation

VSC7212RG bảng dữ liệu(HTML) 22 Page - Vitesse Semiconductor Corporation

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ESE
SEMICONDUCTOR CORPORATION
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7212
Gigabit Interconnect Chip
Page 22
G52268-0, Rev 3.3
04/10/01
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800)-VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Figure 17: Receive Output Timing Waveforms with RMODE = 00 or 01
Table 12: Receive Output AC Characteristics with RMODE = 00 or 01
Figure 18: Receive Output Timing Waveforms with RMODE = 10 or 11
Table 13: Receive Output AC Characteristics with RMODE = 10 or 11
Parameters
Description
Min
Max
Units
Conditions
TCQ
REFCLK Rising Edge to TTL
Output Transition
2.58 ns - 0 bc
5.43 ns - 0 bc
ns
RMODE = 00
bc = Bit Clock
TCQ
REFCLK Rising Edge to TTL
Output Transition
2.58 ns - 2 bc
5.43 ns - 2 bc
ns
RMODE = 01
bc = Bit Clock
TQC
TTL Output Transition to
REFCLK Rising Edge
TPER - TCQ_max
TPER - TCQ_min
ns
Parameters
Description
Min
Max
Units
Conditions
TCQ
RCLK/RCLKN Rising Edge to
TTL Output Transition
-1.25 ns + 4 bc
1.25 ns + 4 bc
ns
RMODE = 10 or 11
bc = Bit Clock
TQC
TTL Output Transition to RCLK/
RCLKN Rising Edge
TPER -
TCQ_max
TPER - TCQ_min
ns
DC
RCLK/RCLKN Duty Cycle
50% - 1 ns
50% + 1 ns
ns
Measured at 1.4 V
REFCLK
(DUAL = 0)
R(7:0), TBERR
KCH, IDLE, ERR
PSDET, RSDET
Valid
Valid
Valid
TCQ_max
TCQ_min
REFCLK
(DUAL = 1)
TQC_min
TPER
RCLK
(DUAL = 0)
R(7:0), TBERR
KCH, IDLE, ERR
PSDET, RSDET
Valid
Valid
Valid
TCQ_max
TCQ_min
RCLK/RCLKN
(DUAL = 1)
TQC_min
TPER



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