PC87332VLJ datasheet(22/98 Pages) NSC

22 / 98 page

20 Configuration Registers (Continued)

TABLE 2-3 Encoded Drive and Motor Pin Information (FER 4 e 1)

Digital Output Register

Drive Control Pins

Decoded Functions

MTR1

MTR0

DR1

DR0

XXX

(Note)

Activate Drive 0 and Motor 0

(Note)

Activate Drive 1 and Motor 1

(Note)

Activate Drive 2 and Motor 2

(Note)

Activate Drive 3 and Motor 3

XXX

(Note)

Activate Drive 0 and Deactivate Motor 0

(Note)

Activate Drive 1 and Deactivate Motor 1

(Note)

Activate Drive 2 and Deactivate Motor 2

(Note)

Activate Drive 3 and Deactivate Motor 3

Note

When FER4 e 1 MTR1 presents a pulse that is the inverted image of the IOW strobe This inverted pulse is active whenever an IO write to address 3F2h

or 372h takes place This pulse is delayed by 25 ns–80 ns after the leading edge of IOW and its leading edge can be used to clock data into an external latch

(eg 74LS175) Address 3F2h is used if the FDC is located at the primary address (FER5 e 0) and address 372h is used if the FDC is located at the

secondary address (FER5 e 1)

TABLE 2-4 Primary and Secondary

Drive Address Selection

Bit 5

Bit 7

Drive

PC-AT Mode

FDC

Primary

3F0–7h

FDC

Secondary

3F0–7h

IDE

Primary

1F0 – 7h 3F6 – 7h

IDE

Secondary

170 – 7h 376 – 7h

252 Function Address Register (FAR Index e 01h)

This register selects the ISA IO address range to which

each peripheral function responds

Bits 01

These bits select the parallel port address as

shown in Table 2-5

TABLE 2-5 Parallel Port Addresses

Bit

Address

Parallel

Port

Interrupt

PC-AT

LPTB (378 – 37F)

IRQ5 (Note)

LPTA (3BC – 3BE)

IRQ7

LPTC (278 – 27F)

IRQ5

Reserved

TRI-STATE

(CTR4 e 0)

Note

The interrupt assigned to this address can be changed to IRQ7 by

setting Bit 3 of the Power and Test Register (PTR)

Bits 2–5

These bits determine which ISA IO address range

is associated with each UART (see Table 2-6 and

Table 2-7)

TABLE 2-6 COM Port Selection for UART1

FAR

UART1

Bit 3

Bit 2

COM

1 (3F8-F)

2 (2F8-F)

3 (Table 2-8)

4 (Table 2-8)

TABLE 2-7 COM Port Selection for UART2

FAR

UART2

Bit 5

Bit 4

COM

1 (3F8-F)

2 (2F8-F)

3 (Table 2-8)

4 (Table 2-8)

Note

COM3 and COM4 addresses are determined by Bits 6 and 7

Bits 67

These bits select the addresses that are used for

COM3 and COM4 (see Table 2-8)

TABLE 2-8 Address Selection for COM3 and COM4

Bit 7

Bit 6

COM3 IRQ4

COM4 IRQ3

3E8–Fh

2E8–Fh

338–Fh

238–Fh

2E8–Fh

2E0–7h

220–7h

228–Fh

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