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PC87332VLJ bảng dữ liệu(PDF) 16 Page - National Semiconductor (TI) |
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PC87332VLJ bảng dữ liệu(HTML) 16 Page - National Semiconductor (TI) |
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16 / 98 page ![]() 10 Pin Description (Continued) Symbol Pin IO Function WP Normal 36 I Write Protect This input indicates that the floppy disk in the selected drive is write protected Mode WP PPM 92 I Write Protect This pin provides an additional Write Protect signal in PPM Mode when PNF e 0 (See PD2 and Table 7-5 for further information) Mode WRITE 95 O Write Strobe This signal is used in EPP mode as a write strobe It is active low (See STB and Table 7-5 for further information) X1OSC 7 I Crystal1Clock One side of an external 24 MHz48 MHz crystal is attached here The other side of the crystal is connected to X2 If a crystal is not used a TTL or CMOS compatible clock is connected to this pin X2 8 O Crystal2 One side of an external 24 MHz48 MHz crystal is attached here The other side of the crystal is connected to X1OSC This pin is left unconnected if an external clock is used ZWS 3O Zero Wait State This pin is the Zero Wait State open drain output pin when bit 6 of FCR is 0 ZWS is driven low when the EPP or ECP is written and the access can be shortened This pin is PWDN when bit 6 of FCR is 1 (See the PWDN pin for further information) 16 |
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