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STA333IS bảng dữ liệu(PDF) 31 Page - STMicroelectronics

tên linh kiện STA333IS
Giải thích chi tiết về linh kiện  100 dB SNR and dynamic range
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STA333IS bảng dữ liệu(HTML) 31 Page - STMicroelectronics

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STA333IS
Register description
5.2.2
Master volume register (addr 0x07)
5.2.3
Channel volume (addr 0x08, 0x09)
Volume setting
The volume structure of the STA333IS consists of individual volume registers for each
channel and a master volume register that provides an offset to each channel’s volume
setting. The individual channel volumes are adjustable in 0.5-dB steps from +48 dB to
-80 dB. As an example, if C3V = 0x00 or +48 dB and MV = 0x18 or -12 dB, then the total
gain for channel 3 = +36 dB.
The master mute, when set to 1, will mute all channels at once, whereas the individual
channel mutes (CxM) mute only that channel. Both the master mute and the channel mutes
provide a “soft mute” with the volume ramping down to mute in 4096 samples from the
maximum volume setting at the internal processing rate (about 96 kHz). A hard mute can be
obtained by commanding a value of all 1’s (255) to any channel volume register or the
master volume register. When volume offsets are provided via the master volume register,
any channel whose total volume is less than -80 dB is muted.
All changes in volume take place at zero-crossings when ZCE = 1 (configuration register F)
on a per-channel basis as this creates the smoothest possible volume transitions. When
ZCE = 0, volume updates will occur immediately.
D7
D6
D5
D4
D3
D2
D1
D0
MV7
MV6
MV5
MV4
MV3
MV2
MV1
MV0
11
11
11
1
1
D7
D6
D5
D4
D3
D2
D1
D0
C1V7
C1V6
C1V5
C1V4
C1V3
C1V2
C1V1
C1V0
01
10
00
0
0
D7
D6
D5
D4
D3
D2
D1
D0
C2V7
C2V6
C2V5
C2V4
C2V3
C2V2
C2V1
C2V0
01
10
00
0
0
Table 41. Master volume offset as a function of MV
MV[7:0]
Volume offset from channel value
00000000 (0x00)
0 dB
00000001 (0x01)
-0.5 dB
00000010 (0x02)
-1 dB
……
01001100 (0x4C)
-38 dB
……
11111110 (0xFE)
-127.5 dB
11111111 (0xFF)
Hard master mute



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