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STA333IS bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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STA333IS bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 43 page ![]() DocID022855 Rev 3 27/43 STA333IS Register description Max power correction Setting the MPC bit turns on special processing that corrects the STA333IS power device at high power. This mode lowers the THD+N of a full FFX system at maximum power output and slightly below. If enabled, MPC is operational in all output modes except tapered (OM[1:0] = 01) and binary. When OCFG = 00, MPC does not affect channels 3 and 4, the line-out channels. Noise-shaper bandwidth selection AM mode enable The STA333IS features an FFX processing mode that minimizes the amount of noise generated in the frequency range of AM radio. This mode is intended for use when FFX is operating in a device with an active AM tuner. The SNR of the FFX processing is reduced to approximately 83 dB in this mode, which is still greater than the SNR of AM radio. PWM speed mode Distortion compensation variable enable Table 26. Max power correction Bit R/W RST Name Description 1R/W 1MPC 1: enable power bridge correction for THD reduction near maximum power output. Table 27. Noise-shaper bandwidth selection Bit R/W RST Name Description 2R/W 0NSBW 1: 3rd order NS 0: 4th order NS Table 28. AM mode enable Bit R/W RST Name Description 3R/W 0AME 0: normal FFX operation 1: AM reduction mode FFX operation Table 29. PWM speed mode Bit R/W RST Name Description 4R/W 0PWMS 0: normal speed (384 kHz) all channels 1: odd speed (341.3 kHz) all channels Table 30. Distortion compensation variable enable Bit R/W RST Name Description 5R/W 0DCCV 0: uses preset DC coefficient 1: uses DCC coefficient |
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