LINR2 datasheet(32/108 Pages) FUJITSU

32 / 108 page

MB96320 Series

FME-MB96320 rev 7

00042DH

Clock Input and LVD Control Register

CILCR

R/W

00042EH-

00042FH

Reserved

000430H

I/O Port P00 - Data Direction Register

DDR00

R/W

000431H

I/O Port P01 - Data Direction Register

DDR01

R/W

000432H

I/O Port P02 - Data Direction Register

DDR02

R/W

000433H

I/O Port P03 - Data Direction Register

DDR03

R/W

000434H

I/O Port P04 - Data Direction Register

DDR04

R/W

000435H

I/O Port P05 - Data Direction Register

DDR05

R/W

000436H

I/O Port P06 - Data Direction Register

DDR06

R/W

000437H

I/O Port P07 - Data Direction Register

DDR07

R/W

000438H

Reserved

000439H

I/O Port P09 - Data Direction Register

DDR09

R/W

00043AH-

00043CH

Reserved

00043DH

I/O Port P13 - Data Direction Register

DDR13

R/W

00043EH-

000440H

Reserved

000441H

I/O Port P17 - Data Direction Register

DDR17

R/W

000442H-

000443H

Reserved

000444H

I/O Port P00 - Port Input Enable Register

PIER00

R/W

000445H

I/O Port P01 - Port Input Enable Register

PIER01

R/W

000446H

I/O Port P02 - Port Input Enable Register

PIER02

R/W

000447H

I/O Port P03 - Port Input Enable Register

PIER03

R/W

000448H

I/O Port P04 - Port Input Enable Register

PIER04

R/W

000449H

I/O Port P05 - Port Input Enable Register

PIER05

R/W

00044AH

I/O Port P06 - Port Input Enable Register

PIER06

R/W

00044BH

I/O Port P07 - Port Input Enable Register

PIER07

R/W

00044CH

Reserved

00044DH

I/O Port P09 - Port Input Enable Register

PIER09

R/W

I/O map MB96(F)32x (13 of 31)

Address

Abbreviation

8-bit access

Abbreviation

16-bit access

Access

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