LINR2 datasheet(4/108 Pages) FUJITSU

4 / 108 page

MB96320 Series

FME-MB96320 rev 7

Real Time Clock

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Can be clocked either from sub oscillator (devices with part number suffix “W”), main

oscillator or from the RC oscillator

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Facility to correct oscillation deviation of Sub clock or RC oscillator clock (clock

calibration)

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Read/write accessible second/minute/hour registers

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Can signal interrupts every half second/second/minute/hour/day

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Internal clock divider and prescaler provide exact 1s clock

External Interrupts

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Edge sensitive or level sensitive

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Interrupt mask and pending bit per channel

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Each available CAN channel RX has an external interrupt for wake-up

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Selected USART channels SIN have an external interrupt for wake-up

Non Maskable Interrupt

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Disabled after reset

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Once enabled, can not be disabled other than by reset.

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Level high or level low sensitive

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Pin shared with external interrupt 0.

External bus interface

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8-bit or 16-bit bidirectional data

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Up to 24-bit addresses

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6 chip select signals

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Multiplexed address/data lines

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Wait state request

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External bus master possible

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Timing programmable

I/O Ports

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Virtually all external pins can be used as general purpose I/O

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All push-pull outputs (except when used as I2C SDA/SCL line)

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Bit-wise programmable as input/output or peripheral signal

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Bit-wise programmable input enable

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Bit-wise programmable input levels: Automotive / CMOS-Schmitt trigger / TTL

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Bit-wise programmable pull-up resistor

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Bit-wise programmable output driving strength for EMI optimization

Package

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80-pin plastic LQFP

Feature

Description

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