ML7396AB datasheet(62/140 Pages) LAPIS

62 / 140 page

FEDL7396A/B/E-07

ML7396A/B/E

62/140

●Interrupt generation function

ML7396 family supports intterupt generation function. When interrupt occurs, SINTN pin (#10) will become “Low” to notify

interrupt to the host MCU.

Interrupt elements are divided into 4groups, [INT_SOURCE_GRP1:B0 0x24] to [INT_SOURCE_GRP4:B0 0x27]. Each

interrupt elements can be masked by using [INT_EN_GRP1:B0 0x2A] to [INT_EN_GRP4] registers.

Note: If one of unmask interrupt event occurs, SINTN maintains “Low”.

Interrupt events table

Each interrupt events is described as belo table.

Group

Name

Function:

INT[25]

PLL unlock interrupt

INT_SOURCE_GRP4

INT[24]

Auto_Ack ready interrupt

INT[23]

FIFO1 TX data request accept completion interrupt

INT[22]

FIFO0 TX data request accept completion interrupt

INT[21]

FIFO1 CRC error interrupt

INT[20]

FIFO0 CRC error interrupt

INT[19]

FIFO1 RX completion interrupt

INT[18]

FIFO0 RX completion interrupt

INT[17]

FIFO1 TX completion interrupt

INT_SOURCE_GRP3

INT[16]

FIFO0 TX completion interrupt

INT[15]

TX FIFO access error interrupt

INT[14]

RX FIFO access error interrupt

INT[13]

TX Length error interrupt

INT[12]

RX Length error interrupt

INT[11]

SFD detection interrupt

INT[10]

RF state transition completion interrupt

INT[09]

Diversity search completion interrupt

INT_SOURCE_GRP2

INT[08]

CCA completion interrupt

no function

INT[05]

FIFO_Full interrupt

INT[04]

FOFO_Empty interrupy

INT[03]

Packet discard competion interrupt

INT[02]

VCO calbration completion interrupt

INT[01]

Reserved

INT_SOURCE_GRP1

INT[00]

Clock stabilization completion interrupt

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