ML7396AB datasheet(79/140 Pages) LAPIS

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FEDL7396A/B/E-07

ML7396A/B/E

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●Programming Data rate changing

50kbps, 100kbps, 200kbps and 400kbps data rate can be chnaged by RATE[2:0] ([DATA_SET:B0 0x47(2-0)]). When

changing data rate, below registers may have to be changed.

Note:

Depending on data rate, the following chage may not be necessary. For details, please refer to each register setting value

corresponding to each data rate in "Initial register setting" file.

Please change data rate setting in TRX_OFF state.

[Bank0]

[RATE_SET1:B0 0x04] register

(Note: setting is necessary only when changing to 150kbps.)

[RATE_SET2:B0 0x05] register

(Note: setting is necessary only when changing to 150kbps.)

[IF_FREQ_AFC_H:B0 0x30] register

[IF_FREQ_AFC_L:B0 0x31] register

[BPF_AFC_ADJ_H:B0 0x32] register

[BPF_AFC_ADJ_L:B0 0x33] register

[TX_PR_LEN:B0 0x42] register

[CH_SPACE_FL:B0 0x4C] register

[CH_SPACE_FH:B0 0x4D] register

[F_DEV_L:B0 0x4E] register

[F_DEV_H:B0 0x4F] register

[2DIV_SEARCH:B0 0x6F] register

[Bank1]

[PLL_CFP_ADJ:B1 0x09] register

[IF_FREQ_H:B1 0x0A] register

[IF_FREQ_L:B1 0x0B] register

[IF_FREQ_CCA_H:B1 0x0C] register

[IF_FREQ_CCA_L:B1 0x0D] register

[BPF_ADJ_H:B1 0x0E] register

[BPF_ADJ_L:B1 0x0F] register

[BPF_CCA_ADJ_H:B1 0x10] register

[BPF_CCA_ADJ_L:B1 0x11] register

[Bank2 registers]

[RATE_ADJ1:B2 0x2A] register

(Note: setting is necessary only when changing to 150kbps.)

[RATE_ADJ2:B2 0x2B] register

(Note: setting is necessary only when changing to 150kbps.)

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