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ML7396AB bảng dữ liệu(PDF) 22 Page - LAPIS Semiconductor Co., Ltd. |
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ML7396AB bảng dữ liệu(HTML) 22 Page - LAPIS Semiconductor Co., Ltd. |
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22 / 140 page  FEDL7396A/B/E-07 ML7396A/B/E 22/140 BANK0 (continued) Bit Address Symbol (# test register) 7 6 5 4 3 2 1 0 Description 0x69 PLL_MON/DIO_SEL PLL lock detection signal output control and DIO mode configuration 0x6a FAST_TX_SET TX trigger level setting in FAST_TX mode 0x6b CH_SET RF channel setting 0x6c RF_STATUS RFstate setting and status indication 0x6d 2DIV_ED_AVG Average number setting for ED calculation during 2 diversity 0x6e 2DIV_GAIN_CNTRL Gain control setting during 2 diversity 0x6f 2DIV_SEARCH 2 diversity search mode and search time setting 0x70 2DIV_FAST_LV ED threshold level setting during 2 diversity FAST mode 0x71 2DIV_CNTRL 2 diversity setting 0x72 2DIV_RSLT 2 diversity resurt indication and forced antenna control setting 0x73 ANT1_ED Acquired ED value by antenna 1 0x74 ANT2_ED Acquired ED value by antenna 2 0x75 RF_CNTRL_SET RF control pin configuration (ANT_SW, TRX_SW,DCNT) 0x76 Reserved Reserved 0x77 CRC_AREA/FIFO_TRG CRC calculation field and FIFO trigger setting 0x78 RSSI_MON RSSI value indication 0x79 TEMP_MON Temperature indication 0x7a PN9_SET_L PN9 initialized status setting / randum number indication (low byte) 0x7b PN9_SET_H PN9 initialized status setting / randum number indication (high 1bit) and PN9 enable control 0x7c RD_ FIFO_LAST FIFO remaining size or FIFO address indication 0x7d Reserved Reserved 0x7e WR_TX_FIFO TX FIFO 0x7f RD_RX_FIFO RX FIFO BANK1 Bit Address Symbol 7 6 5 4 3 2 1 0 Description 0x00 BANK_SEL Register access bank selection 0x01 DEMOD_SET Demodulator setting 0x02 RSSI_ADJ RSSI value adjustment 0x03 RSSI/TEMP_OUT RSSI and Temperature data output setting 0x04 PA_ADJ1 PA adjustment 1st setting 0x05 PA_ADJ2 PA adjustment 2nd setting 0x06 PA_ADJ3 PA adjustment 3rd setting 0x07 PA_CNTRL External PA control and PA mode setting 0x08 SW_OUT/RAMP_ADJ ANT_SW/TRX_SW configuration and PA ramping up adjustment 0x09 PLL_CP_ADJ PLL charge pump current adjustment 0x0a IF_FREQ_H IF frequency setting (high byte) 0x0b IF_FREQ_L IF frequency setting (low byte) 0x0c IF_FREQ_CCA_H IF frequency setting during CCA operation (high byte) 0x0d IF_FREQ_CCA_L IF frequency setting during CCA operation (low byte) 0x0e BPF_ADJ_H Bandpass filter bandwidth adjustment (high 2bits) 0x0f BPF_ADJ_L Bandpass filter bandwidth adjustment (low byte) 0x10 BPF_CCA_ADJ_H Bandpass filter bandwidth adjustment during CCA operation (high 2bits) 0x11 BPF_CCA_ADJ_L Bandpass filter bandwidth adjustment during CCA operation (low byte) 0x12 RSSI_LPF_ADJ RSSI lowpass filter adjustment 0x13 PA_REG_FINE_ADJ PA regulator fine adjustment 0x14 IQ_MAG_ADJ IF I/Q amplitude balance adjustment 0x15 IQ_PHASE_ADJ IF I/Q phase balance adjustment 0x16 VCO_CAL_MIN_FL VCO calibration low limit frequency setting (low byte) |
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