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TMS320C6711 bảng dữ liệu(PDF) 71 Page - Texas Instruments |
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TMS320C6711 bảng dữ liệu(HTML) 71 Page - Texas Instruments |
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71 / 129 page  TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATING-POINT DIGITAL SIGNAL PROCESSORS SPRS088L − FEBRUARY 1999 − REVISED MAY 2004 71 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 INPUT AND OUTPUT CLOCKS timing requirements for CLKIN†‡ (see Figure 23) [C6711/11B] –100 –150 NO. CLKMODE = x4 CLKMODE = x1 CLKMODE = x4 CLKMODE = x1 UNIT NO. MIN MAX MIN MAX MIN MAX MIN MAX UNIT 1 tc(CLKIN) Cycle time, CLKIN 40 10 26.7 6.7 ns 2 tw(CLKINH) Pulse duration, CLKIN high 0.4C 0.45C 0.4C 0.45C ns 3 tw(CLKINL) Pulse duration, CLKIN low 0.4C 0.45C 0.4C 0.45C ns 4 tt(CLKIN) Transition time, CLKIN 5 1 5 1 ns † The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. ‡ C = CLKIN cycle time in nanoseconds (ns). For example, when CLKIN frequency is 40 MHz, use C = 25 ns. timing requirements for CLKIN†‡§ (see Figure 23) [C6711C/11D] GDPA-167 –200 NO. PLL MODE (PLLEN = 1) BYPASS MODE (PLLEN = 0) PLL MODE (PLLEN = 1) BYPASS MODE (PLLEN = 0) UNIT MIN MAX MIN MAX MIN MAX MIN MAX 1 tc(CLKIN) Cycle time, CLKIN 6 83.3 6 5 83.3 5 ns 2 tw(CLKINH) Pulse duration, CLKIN high 0.4C 0.4C 0.4C 0.4C ns 3 tw(CLKINL) Pulse duration, CLKIN low 0.4C 0.4C 0.4C 0.4C ns 4 tt(CLKIN) Transition time, CLKIN 5 5 5 5 ns † The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. ‡ C = CLKIN cycle time in nanoseconds (ns). For example, when CLKIN frequency is 40 MHz, use C = 25 ns. § See the PLL and PLL controller [C6711C/C6711D only] section of this data sheet. timing requirements for CLKIN†‡§ (see Figure 23) [C6711D−250] –250 NO. PLL MODE (PLLEN = 1) BYPASS MODE (PLLEN = 0) UNIT MIN MAX MIN MAX 1 tc(CLKIN) Cycle time, CLKIN 4 83.3 4 ns 2 tw(CLKINH) Pulse duration, CLKIN high 0.4C 0.4C ns 3 tw(CLKINL) Pulse duration, CLKIN low 0.4C 0.4C ns 4 tt(CLKIN) Transition time, CLKIN 5 5 ns † The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN. ‡ C = CLKIN cycle time in nanoseconds (ns). For example, when CLKIN frequency is 40 MHz, use C = 25 ns. § See the PLL and PLL controller [C6711C/C6711D only] section of this data sheet. CLKIN 1 2 3 4 4 Figure 23. CLKIN Timings |
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