TMS320DM355 datasheet(89/163 Pages) TI1

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TMS320DM355

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SPRS463G – SEPTEMBER 2007 – REVISED JUNE 2010

3.12 Device Boot Modes

The DM355 ARM can boot from either Async EMIF (AEMIF/OneNand) or from ARM ROM, as determined

by the setting of the device configuration pins BTSEL[1:0]. The BTSEL[1:0] pins can define the ROM boot

mode further as well.

The boot selection pins (BTSEL[1:0]) determine the ARM boot process. After reset (POR, warm reset, or

max reset), ARM program execution begins in ARM ROM at 0x0000: 8000, except when BTSEL[1:0] = 01,

indicating AEMIF (AEMIF/OneNand) boot. See Section 3.11.1 for information on the boot selection pins.

3.12.1 Boot Modes Overview

DM355’s ARM ROM boot loader (RBL) executes when the BTSEL[1:0] pins indicate a condition other than

the normal ARM EMIF boot.

•

If BTSEL[1:0] = 01 - Asynchronous EMIF (AEMIF) boot. This mode is handled by hardware control and

does not involve the ROM. In the case of OneNAND, the user is responsible for putting any necessary

boot code in the OneNAND's boot page. This code shall configure the AEMIF module for the

OneNAND device. After the AEMIF module is configured, booting will continue immediately after the

OneNAND’s boot page with the AEMIF module managing pages thereafter.

•

The RBL supports 3 distinct boot modes:

–

BTSEL[1:0] = 00 - ARM NAND/SPI Boot

–

BTSEL[1:0] = 10 - ARM MMC/SD Boot

–

BTSEL[1:0] = 11 - ARM UART Boot

•

In NAND mode if SPI boot fails, then NAND mode is tried. If NAND boot fails, then MMC/SD mode is

tried.

•

If MMC/SD boot fails, then MMC/SD boot is tried again.

•

If UART boot fails, then UART boot is tried again.

•

RBL uses GIO61 to indicate boot status (can use to blink LED):

–

After reset, GIO61 is initially driven low (e.g LED off)

–

If NAND boot fails, then GIO61 shall toggle at 4Hz while MMC/SD boot is tried.

–

If MMC/SD boot fails, then GIO61 shall toggle at 4Hz while MMC/SD boot is retried.

–

If UART boot fails, then GIO61 shall toggle at 2Hz while UART boot is retried.

–

When boot is successful, just before program control is given to UBL, GIO61 is driven high (e.g.

LED on)

–

DM355 Timer0 shall be used to accurately toggle GIO61 at 4Hz and 2Hz

•

ARM ROM Boot - SPI boot in NAND Mode

–

No support for a full firmware boot. Instead, copies a second stage User Boot Loader (UBL) from

SPI to ARM Internal RAM (AIM) and transfers control to the user software.

–

Support for 16 and 24 bit SPI EEPROMs

–

Support for up to 30KB UBL (32KB - ~2KB for RBL stack)

–

RBL will copy UBL to ARM Internal RAM (AIM) via SPI interface from a SPI peripheral like SPI

EEPROM. RBL will then transfer control to the UBL.

•

ARM ROM Boot - NAND Mode (See Section 3.12.2 for a full explanation of the differences between

Standard Mode and Compatibility Mode.):

–

No support for a full firmware boot. Instead, copies a second stage User Boot Loader (UBL) from

NAND flash to ARM internal RAM (AIM) and transfers control to the user-defined UBL.

–

Support for NAND with page sizes up to 8192 bytes in Standard Mode and 2048 bytes in

Compatibility Mode

Note: At the time of documentation for this device, 8192-byte devices were not available for testing.

The code does contain support for these devices; however, it has not yet been tested.

–

Support for magic number error detection and retry (up to 24 times) when loading UBL

–

Support for up to 30KB UBL (32KB IRAM - ~2KB for RBL stack)

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