COP8CCR9IMT7SLASHNOPB datasheet(34/111 Pages) TI1

34 / 111 page

COP8CBR9, COP8CCR9, COP8CDR9

SNOS535I – OCTOBER 2000 – REVISED MARCH 2013

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The ENAD register contains the following bits:

ADCH3

ADC channel select bit

ADCH2

ADC channel select bit

ADCH1

ADC channel select bit

ADCH0

ADC channel select bit

ADMOD

Places the ADC in single-ended or differential mode.

MUX

Enables the ADC multiplexor output.

PSC

Switches the ADC clock between a divide by one or a divide by sixteen of MCLK.

ADBSY

Signifies that the ADC is currently busy performing a conversion. When set by the user,

starts a conversion.

5.10 In-System Programming

5.10.1 INTRODUCTION

This device provides the capability to program the program memory while installed in an application board.

This feature is called In System Programming (ISP). It provides a means of ISP by using the

MICROWIRE/PLUS, or the user can provide his own, customized ISP routine. The factory installed ISP

uses the MICROWIRE/PLUS port. The user can provide his own ISP routine that uses any of the

capabilities of the device, such as USART, parallel port, etc.

5.10.2 FUNCTIONAL DESCRIPTION

The organization of the ISP feature consists of the user flash program memory, the factory boot ROM, and

some registers dedicated to performing the ISP function. See Figure 5-7 for a simplified block diagram.

The factory installed ISP that uses MICROWIRE/PLUS is located in the Boot ROM. The size of the Boot

ROM is 1K bytes and also contains code to facilitate in system emulation capability. If a user chooses to

write his own ISP routine, it must be located in the flash program memory.

Figure 5-7. Block Diagram of ISP

Functional Description

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Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9

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