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COP8CCR9IMT7/NOPB bảng dữ liệu(PDF) 24 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  8-Bit CMOS Flash Microcontroller with 32k Memory
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COP8CBR9, COP8CCR9, COP8CDR9
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
www.ti.com
Figure 5-1. RAM Organization
5.4.1
Virtual EEPROM
The Flash memory and the User ISP functions (see Section 5.7), provide the user with the capability to
use the flash program memory to back up user defined sections of RAM. This effectively provides the user
with the same nonvolatile data storage as EEPROM. Management, and even the amount of memory
used, are the responsibility of the user, however the flash memory read and write functions have been
provided in the boot ROM.
One typical method of using the Virtual EEPROM feature would be for the user to copy the data to RAM
during system initialization, periodically, and if necessary, erase the page of Flash and copy the contents
of the RAM back to the Flash.
5.5
OPTION REGISTER
The Option register, located at address 0x7FFF in the Flash Program Memory, is used to configure the
user selectable security, WATCHDOG, and HALT options. The register can be programmed only in
external Flash Memory programming or ISP Programming modes. Therefore, the register must be
programmed at the same time as the program memory. The contents of the Option register shipped from
the factory read 00 Hex.
The format of the Option register is as follows:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WATCH
Reserved
SECURITY
Reserved
HALT
FLEX
DOG
Bits 7, 6
These bits are reserved and must be 0.
Bit 5
= 1
Security enabled. Flash Memory read and write are not allowed except in User ISP/Virtual E2
commands. Mass Erase is allowed.
= 0
Security disabled. Flash Memory read and write are allowed.
Bits 4, 3
These bits are reserved and must be 0.
24
Functional Description
Copyright © 2000–2013, Texas Instruments Incorporated
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Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9



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