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COP8CCR9IMT7/NOPB bảng dữ liệu(PDF) 20 Page - Texas Instruments |
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COP8CCR9IMT7/NOPB bảng dữ liệu(HTML) 20 Page - Texas Instruments |
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20 / 111 page ![]() COP8CBR9, COP8CCR9, COP8CDR9 SNOS535I – OCTOBER 2000 – REVISED MARCH 2013 www.ti.com L4 Multi-input Wake-up or T2A (Timer T2A Input/Output) L3 Multi-Input Wake-up and/or RDX (USART Receive) L2 Multi-Input Wake-up or TDX (USART Transmit) L1 Multi-Input Wake-up and/or CKX (USART Clock) (Low Speed Oscillator Output) L0 Multi-Input Wake-up (Low Speed Oscillator Input) Port D is an 8-bit output port that is preset high when RESET goes low. The user can tie two or more D port outputs (except D2) together in order to get a higher drive. NOTE Care must be exercised with the D2 pin operation. At RESET, the external loads on this pin must ensure that the output voltages stay above 0.7 VCC to prevent the chip from entering special modes. Also keep the external loading on D2 to less than 1000 pF. Figure 4-2. I/O Port Configurations Figure 4-3. I/O Port Configurations—Output Mode 20 Pin Descriptions Copyright © 2000–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9 |
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