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AM1705DPTP4 bảng dữ liệu(PDF) 67 Page - Texas Instruments

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tên linh kiện AM1705DPTP4
Giải thích chi tiết về linh kiện  AM1705 ARM짰 Microprocessor
PDF  165 Pages
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nhà sản xuất  TI1 [Texas Instruments]
Trang chủ  http://www.ti.com
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AM1705DPTP4 bảng dữ liệu(HTML) 67 Page - Texas Instruments

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EMB_CS
EMB_CAS
EMB_RAS
EMB_WE
EMB_CLK
EMB_SDCKE
EMB_BA[1:0]
EMB_A[x:0]
EMB_D[x:0]
EMB_WE_DQM[x:0]
SDRAM
Interface
Cmd/Write
FIFO
Registers
Read
FIFO
Crossbar
EMIFB
Master
Peripherals
EDMA
CPU
MPU2
AM1705
www.ti.com
SPRS657E – FEBRUARY 2010 – REVISED JUNE 2014
6.11 External Memory Interface B (EMIFB)
The following EMIFB Functional Block Diagram illustrates a high-level view of the EMIFB and its
connections within the device. Multiple requesters have access to EMIFB through a switched central
resource (indicated as an overbar in the figure). The EMIFB implements a split transaction internal bus,
allowing concurrence between reads and writes from the various requesters.
Figure 6-17. EMIFB Functional Block Diagram
EMIFB supports a 3.3V LVCMOS Interface.
6.11.1 EMIFB SDRAM Loading Limitations
EMIFB supports SDRAM up to 152 MHz with up to two SDRAM or asynchronous memory loads.
Additional loads will limit the SDRAM operation to lower speeds and the maximum speed should be
confirmed by board simulation using IBIS models.
Copyright © 2010–2014, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
67
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Product Folder Links: AM1705



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