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PEB2256HT bảng dữ liệu(PDF) 48 Page - Infineon Technologies AG |
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PEB2256HT bảng dữ liệu(HTML) 48 Page - Infineon Technologies AG |
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48 / 490 page ![]() FALC56 V1.2 PEB 2256 Pin Descriptions Data Sheet 48 2002-08-27 • Table 5 Pin Definitions - Miscellaneous Pin No. Ball No. Symbol Input (I) Output (O) Supply (S) Function Power Supply 4D3 V DDR S Positive Power Supply for the analog receiver 1A1 V SSR S Power Ground for the analog receiver 6D2 V DDX S Positive Power Supply for the analog transmitter 8D1 V SSX S Power Ground for the analog transmitter 9 24 34 41 58 71 A5 C8 E2 G4 J6 J9 V DD S Positive Power Supply for the digital subcircuits (3.3 V) For correct operation, all six pins have to be connected to positive power supply. 10 25 35 42 59 72 B9 C5 E4 H9 J3 J7 V SS S Power Ground for digital subcircuits (0 V) For correct operation, all six pins have to be connected to ground. Device Reset 13 F3 RES I Reset A low signal on this pin forces the FALC ®56 into reset state. During reset the FALC ®56 needs an active clock on pin MCLK. During reset all bidirectional output stages are in input mode, if signal RD is “high” (to disable the data bus output drivers). |
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