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SPEAR320S bảng dữ liệu(PDF) 94 Page - STMicroelectronics

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SPEAR320S bảng dữ liệu(HTML) 94 Page - STMicroelectronics

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Timing requirements
SPEAr320S
94/113
Doc ID 022508 Rev 2
5.12
I2S timing characteristics
Figure 27.
I2S waveform
5.13
PWM timing characteristics
This section describes the timing characteristics of the four PWM generators. Figure 28
shows two PWM waveforms in two example configurations programmed using the PWM
registers.
Figure 28.
PWM timing waveforms
Config. 1: Prescalerx = 0, Duty_reg_x = 2, Period_Reg_x = 4.
Config. 2: Prescalerx = 1, Duty_reg_x = 2, Period_Reg_x = 4.
Calculations (in PLCK periods):
PWMxDuty = (Prescalerx +1) * Duty_reg_x
PWMx Period = (Prescalerx +1) * (Period_Reg_x = 1
Table 69.
I2S timing requirements
Symbol
Description
Min
Max
Unit
tCK
I2S_CLK clock period
40
ns
tD
I2S_CLK to I2S_TX output delay
3.8
9
tS
Setup time requirement for I2S_CLK
6
tH
Hold time requirement for I2S_CLK
1
Th
I2S_CLK
I2S_TX, I2S_LR
TCKhigh
TCKlow
Ts
Tf
Tr
2 x PCLK
3 x PCLK
6 x PCLK
4 x PCLK
td
PCLK
PWMx
(Config. 1)
PWMx
(Config. 2)



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