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MEC1322 bảng dữ liệu(PDF) 129 Page - Microchip Technology |
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MEC1322 bảng dữ liệu(HTML) 129 Page - Microchip Technology |
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129 / 456 page ![]() 2014 - 2015 Microchip Technology Inc. DS00001719D-page 129 MEC1322 10.4 Interface This block is designed to be accessed externally and internally via a register interface. 10.5 Signal Description There are no external signals. 10.6 Host Interface The registers defined for the ACPI Embedded Controller Interface (ACPI-ECI) are accessible by the System Host and the Embedded Controller as indicated in Section 10.12, "Runtime Registers" and Section 10.13, "EC-Only Registers". 10.7 Power, Clocks and Reset This section defines the Power, Clock, and Reset parameters of the block. 10.7.1 POWER DOMAINS 10.7.2 CLOCK INPUTS This block only requires the Host interface clocks to synchronize registers access. 10.7.3 RESETS FIGURE 10-1: I/O DIAGRAM OF BLOCK TABLE 10-2: POWER SOURCES Name Description VCC1 The logic and registers implemented in this block reside on this single power well. TABLE 10-3: RESET SIGNALS Name Description VCC1_RESET VCC1_RESET resets all the logic and registers in ACPI Embedded Controller Interface (ACPI-ECI). ACPI Embedded Controller Interface (ACPI-ECI) Interrupts Power, Clocks and Reset Host Interface Signal Description |
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