MEC1322 datasheet(419/456 Pages) MICROCHIP

tên linh kiện	MEC1322

Giải thích chi tiết về linh kiện	Keyboard and Embedded Controller for Notebook PC

PDF	456 Pages

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 419

MEC1322

FIGURE 38-27:

INTERFACE TIMING, FULL DUPLEX MODE (TCLKPH = 0, RCLKPH = 0)

In this mode, data is available immediately when a device is selected and is sampled on the first and following odd

SPCLK edges by the master and slave.

FIGURE 38-28:

SPI INTERFACE TIMING, FULL DUPLEX MODE (TCLKPH = 1, RCLKPH = 0)

In this mode, the master requires an initial SPCLK edge before data is available. The data from slave is available imme-

diately when the slave device is selected. The data is sampled on the first and following odd edges by the master. The

data is sampled on the second and following even SPCLK edges by the slave.

SPCLK (CLKPOL = 0)

SPCLK (CLKPOL = 1)

SPDIN

(RCLKPH = 0)

SPDOUT

(TCLKPH = 0)

CS (GPIO)

LAST DATA BIT SAMPLED BY

MASTER AND SLAVE

FIRST DATA BIT SAMPLED BY

MASTER AND SLAVE

SPCLK (CLKPOL = 0)

SPCLK (CLKPOL = 1)

SPDOUT

(TCLKPH = 1)

SPDIN

(RCLKPH = 0)

CS (GPIO)

FIRST DATA BIT SAMPLED BY

SLAVE

LAST DATA BIT SAMPLED BY

SLAVE

FIRST DATA BIT SAMPLED BY

MASTER

LAST DATA BIT SAMPLED BY

MASTER

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