MEC1322 datasheet(338/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 338

 2014 - 2015 Microchip Technology Inc.

28.10.2

LED LIMITS REGISTER

This register may be written at any time. Values written into the register are held in an holding register, which is trans-

ferred into the actual register at the end of a PWM period. The two byte fields may be written independently. Reads of

this register return the current contents and not the value of the holding register.

6 ENABLE_UPDATE

This bit is set to 1 when written with a ‘1’. Writes of ‘0’ have no effect.

Hardware clears this bit to 0 when the breathing configuration regis-

ters are updated at the end of a PWM period. The current state of the

bit is readable any time.

This bit is used to enable consistent configuration of LED_DELAY,

LED_STEP and LED_INT. As long as this bit is 0, data written to

those three registers is retained in a holding register. When this bit is

1, data in the holding register are copied to the operating registers at

the end of a PWM period. When the copy completes, hardware

clears this bit to 0.

R/WS

VCC1_

RESET

5:4 PWM_SIZE

This bit controls the behavior of PWM:

3=Reserved

2=PWM is configured as a 6-bit PWM

1=PWM is configured as a 7-bit PWM

0=PWM is configured as an 8-bit PWM

R/W

VCC1_

RESET

3 SYNCHRONIZE

When this bit is ‘1’, all counters for all LEDs are reset to their initial

values. When this bit is ‘0’ in the LED Configuration Register for all

LEDs, then all counters for LEDs that are configured to blink or

breathe will increment or decrement, as required.

To synchronize blinking or breathing, the SYNCHRONIZE bit should

be set for at least one LED, the control registers for each LED should

be set to their required values, then the SYNCHRONIZE bits should

all be cleared. If the all LEDs are set for the same blink period, they

will all be synchronized.

R/W

VCC1_

RESET

2 CLOCK_SOURCE

This bit controls the base clock for the PWM. It is only valid when

CNTRL is set to blink (2).

1=Clock source is the 48 MHz clock

0=Clock source is the 32.768 KHz clock

R/W

VCC1_

RESET

1:0 CONTROL

This bit controls the behavior of PWM:

3=PWM is always on

2=LED blinking (standard PWM)

1=LED breathing configuration

0=PWM is always off. All internal registers and counters are reset to

0. Clocks are gated

R/W

00b

VCC1_

RESET

11b

WDT TC

Offset

00h

Bits

Description

Type

Default

Reset

Event

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