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XC164CS bảng dữ liệu(PDF) 10 Page - Infineon Technologies AG |
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XC164CS bảng dữ liệu(HTML) 10 Page - Infineon Technologies AG |
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10 / 71 page ![]() XC164 Derivatives General Device Information Data Sheet 6 V2.1, 2003-06 Table 2 Pin Definitions and Functions Symbol Pin Num. Input Outp. Function RSTIN 1 I Reset Input with Schmitt-Trigger characteristics. A low level at this pin while the oscillator is running resets the XC164. A spike filter suppresses input pulses <10 ns. Input pulses >100 ns safely pass the filter. The minimum duration for a safe recognition should be 100 ns + 2 CPU clock cycles. Note: The reset duration must be sufficient to let the hardware configuration signals settle. External circuitry must guarantee low level at the RSTIN pin at least until both power supply voltages have reached the operating range. P20.12 2 IO For details, please refer to the description of P20. NMI 3 I Non-Maskable Interrupt Input. A high to low transition at this pin causes the CPU to vector to the NMI trap routine. When the PWRDN (power down) instruction is executed, the NMI pin must be low in order to force the XC164 into power down mode. If NMI is high, when PWRDN is executed, the part will continue to run in normal mode. If not used, pin NMI should be pulled high externally. P0H.0- P0H.3 4 …7 IO For details, please refer to the description of PORT0. |
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