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XC164CS bảng dữ liệu(PDF) 39 Page - Infineon Technologies AG |
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XC164CS bảng dữ liệu(HTML) 39 Page - Infineon Technologies AG |
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39 / 71 page ![]() XC164 Derivatives Functional Description Data Sheet 35 V2.1, 2003-06 3.11 Asynchronous/Synchronous Serial Interfaces (ASC0/ASC1) The Asynchronous/Synchronous Serial Interfaces ASC0/ASC1 (USARTs) provide serial communication with other microcontrollers, processors, terminals or external peripheral components. They are upward compatible with the serial ports of the Infineon 8-bit microcontroller families and support full-duplex asynchronous communication and half- duplex synchronous communication. A dedicated baud rate generator with a fractional divider precisely generates all standard baud rates without oscillator tuning. For transmission, reception, error handling, and baudrate detection 5 separate interrupt vectors are provided. In asynchronous mode, 8- or 9-bit data frames (with optional parity bit) are transmitted or received, preceded by a start bit and terminated by one or two stop bits. For multiprocessor communication, a mechanism to distinguish address from data bytes has been included (8-bit data plus wake-up bit mode). IrDA data transmissions up to 115.2 kbit/s with fixed or programmable IrDA pulse width are supported. In synchronous mode, bytes (8 bits) are transmitted or received synchronously to a shift clock which is generated by the ASC0/1. The LSB is always shifted first. In both modes, transmission and reception of data is FIFO-buffered. An autobaud detection unit allows to detect asynchronous data frames with its baudrate and mode with automatic initialization of the baudrate generator and the mode control bits. A number of optional hardware error detection capabilities has been included to increase the reliability of data transfers. A parity bit can automatically be generated on transmission or be checked on reception. Framing error detection allows to recognize data frames with missing stop bits. An overrun error will be generated, if the last character received has not been read out of the receive buffer register at the time the reception of a new character is complete. Summary of Features • Full-duplex asynchronous operating modes – 8- or 9-bit data frames, LSB first, one or two stop bits, parity generation/checking – Baudrate from 2.5 Mbit/s to 0.6 bit/s (@ 40 MHz) – Multiprocessor mode for automatic address/data byte detection – Support for IrDA data transmission/reception up to max. 115.2 kbit/s (@ 40 MHz) – Loop-back capability – Auto baudrate detection • Half-duplex 8-bit synchronous operating mode at 5 Mbit/s to 406.9 bit/s (@ 40 MHz) • Buffered transmitter/receiver with FIFO support (8 entries per direction) • Loop-back option available for testing purposes • Interrupt generation on transmitter buffer empty condition, last bit transmitted condition, receive buffer full condition, error condition (frame, parity, overrun error), start and end of an autobaud detection Note: The serial interface ASC1 is not available in all derivatives of the XC164. |
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