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XC164CS bảng dữ liệu(PDF) 62 Page - Infineon Technologies AG |
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XC164CS bảng dữ liệu(HTML) 62 Page - Infineon Technologies AG |
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62 / 71 page ![]() XC164 Derivatives Timing Parameters Data Sheet 58 V2.1, 2003-06 For a period of N × TCM the accumulated PLL jitter is defined by the deviation D N: DN [ns] = ±(1.5 + 6.32 × N / fMC); fMC in [MHz], N = number of consecutive TCMs. So, for a period of 3 TCMs @ 20 MHz and K = 12: D3 = ±(1.5 + 6.32 × 3 / 20) = 2.448 ns. This formula is applicable for K × N < 95. For longer periods the K× N=95 value can be used. This steady value can be approximated by: DNmax [ns] = ±(1.5 + 600 / (K × fMC)). Figure 16 Approximated Accumulated PLL Jitter Note: The bold lines indicate the minimum accumulated jitter which can be achieved by selecting the maximum possible output prescaler factor K. Different frequency bands can be selected for the VCO, so the operation of the PLL can be adjusted to a wide range of input and output frequencies: Table 15 VCO Bands for PLL Operation1) 1) Values guarnteed by design characterisation. PLLCON.PLLVB VCO Frequency Range Base Frequency Range 00 100 …150 MHz 20 …80 MHz 01 150 …200 MHz 40 …130 MHz 10 200 …250 MHz 60 …180 MHz 11 Reserved m c b04413_x c .vs d A c c. jitte r D N ±8 ±6 ns ±4 ±2 ±1 0 51 0 2 0 25 N K=5 20 MH z 40 M Hz ±7 ±5 ±3 15 K=6 K= 1 2 K= 1 5 K= 8 K= 1 0 1 |
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