M30622ECTFP datasheet(121/184 Pages) MITSUBISHI

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121

Tentative Specifications REV.A

Mitsubishi microcomputers

M16C / 62T Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Specifications in this manual are tentative and subject to change.

Under

development

Clock synchronous serial I/O mode

Item

Specification

Transfer data format

• Transfer data length: 8 bits

Transfer clock

• When internal clock is selected (bit 3 at addresses 03A016, 03A816, 037816

= “0”) : fi/ 2(n+1) (Note 1)

fi = f1, f8, f32

• When external clock is selected (bit 3 at addresses 03A016, 03A816, 037816

= “1”) : Input from CLKi pin

Transmission/reception control

_______

• CTS function/RTS function/CTS, RTS function chosen to be invalid

Transmission start condition

• To start transmission, the following requirements must be met:

_ Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 037D16) = “1”

_ Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 037D16) = “0”

_______

_ When CTS function selected, CTS input level = “L”

• Furthermore, if external clock is selected, the following requirements must also be met:

_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “0”:

CLKi input level = “H”

_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “1”:

CLKi input level = “L”

Reception start condition

• To start reception, the following requirements must be met:

_ Receive enable bit (bit 2 at addresses 03A516, 03AD16, 037D16) = “1”

_ Transmit enable bit (bit 0 at addresses 03A516, 03AD16, 037D16) = “1”

_ Transmit buffer empty flag (bit 1 at addresses 03A516, 03AD16, 037D16) = “0”

• Furthermore, if external clock is selected, the following requirements must

also be met:

_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “0”:

CLKi input level = “H”

_ CLKi polarity select bit (bit 6 at addresses 03A416, 03AC16, 037C16) = “1”:

CLKi input level = “L”

• When transmitting

_ Transmit interrupt cause select bit (bits 0, 1 at address 03B016, bit 4 at

address 037D16) = “0”: Interrupts requested when data transfer from UARTi

transfer buffer register to UARTi transmit register is completed

_ Transmit interrupt cause select bit (bits 0, 1 at address 03B016, bit 4 at

address 037D16) = “1”: Interrupts requested when data transmission from

UARTi transfer register is completed

• When receiving

_ Interrupts requested when data transfer from UARTi receive register to

UARTi receive buffer register is completed

Error detection

• Overrun error (Note 2)

This error occurs when the next data is ready before contents of UARTi

receive buffer register are read out

Interrupt request

generation timing

Note 1: “n” denotes the value 0016 to FF16 that is set to the UART bit rate generator.

Note 2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that

the UARTi receive interrupt request bit is not set to “1”.

(1) Clock synchronous serial I/O mode

The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Tables 1.19.2

and 1.19.3 list the specifications of the clock synchronous serial I/O mode. Figure 1.19.9 shows the

UARTi transmit/receive mode register.

In M30623(80-pin package), do not use UART2 as clock synchronous serial I/O.

Table 1.19.2. Specifications of clock synchronous serial I/O mode (1)

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