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M30622ECTFP bảng dữ liệu(PDF) 113 Page - Mitsubishi Electric Semiconductor |
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M30622ECTFP bảng dữ liệu(HTML) 113 Page - Mitsubishi Electric Semiconductor |
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113 / 184 page ![]() 113 Tentative Specifications REV.A Mitsubishi microcomputers M16C / 62T Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Specifications in this manual are tentative and subject to change. Under development Serial I/O Figure 1.19.1. Block diagram of UARTi (i = 0 to 2) n0 : Values set to UART0 bit rate generator (BRG0) n1 : Values set to UART1 bit rate generator (BRG1) n2 : Values set to UART2 bit rate generator (BRG2) RxD2 Reception control circuit Transmission control circuit 1 / (n2+1) 1/16 1/16 1/2 Bit rate generator (address 037916) Clock synchronous type (when internal clock is selected) UART reception Clock synchronous type UART transmission Clock synchronous type Clock synchronous type (when internal clock is selected) Clock synchronous type (when external clock is selected) Receive clock Transmit clock CLK2 CTS2 / RTS2 f1 f8 f32 Vcc RTS2 CTS2 TxD2 (UART2) RxD polarity reversing circuit TxD polarity reversing circuit RxD0 1 / (n0+1) 1/2 Bit rate generator (address 03A116) Clock synchronous type (when internal clock is selected) UART reception Clock synchronous type UART transmission Clock synchronous type Clock synchronous type (when internal clock is selected) Clock synchronous type (when external clock is selected) Receive clock Transmit clock CLK0 Clock source selection CTS0 / RTS0 f1 f8 f32 Reception control circuit Transmission control circuit Internal External Vcc RTS0 CTS0 TxD0 Transmit/ receive unit RxD1 1 / (n1+1) 1/16 1/16 1/2 Bit rate generator (address 03A916) Clock synchronous type (when internal clock is selected) UART reception Clock synchronous type UART transmission Clock synchronous type Clock synchronous type (when internal clock is selected) Clock synchronous type (when external clock is selected) Receive clock Transmit clock CLK1 Clock source selection f1 f8 f32 Reception control circuit Transmission control circuit Internal External RTS1 CTS1 TxD1 (UART1) (UART0) CLK polarity reversing circuit CLK polarity reversing circuit CTS/RTS disabled CTS/RTS separated Clock output pin select switch CTS1 / RTS1 / CTS0 / CLKS1 CTS/RTS disabled CTS0 from UART1 CTS/RTS selected CTS/RTS disabled VCC CTS0 to UART0 CTS0 CTS/RTS disabled CTS/RTS separated CTS/RTS disabled CTS/RTS disabled CTS/RTS selected CLK polarity reversing circuit Internal External Clock source selection Transmit/ receive unit Transmit/ receive unit 1/16 1/16 Note 1: In M30623(80-pin package), CLK2 and CTS2/RTS2 have no external pin. Note 2: In M30623(80-pin package), do not use UART2 as clock synchronous serial I/O. |
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