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RM0319 bảng dữ liệu(PDF) 300 Page - STMicroelectronics

tên linh kiện RM0319
Giải thích chi tiết về linh kiện  SPEAr320S architecture and functionality
PDF  368 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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RM0319 bảng dữ liệu(HTML) 300 Page - STMicroelectronics

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Security co-processor (C3)
RM0319
300/368
Doc ID 022640 Rev 3
C3 has two interfaces:
●
AHB Master Interface: it is used to fetch instruction flows, to access input data,
parameters and to store output data to system memory.
●
AHB Slave Interface: it is used to set-up the device and to access all the registers.
C3 has been designed to perform acceleration of data-intensive applications where
computationally expensive algorithms must operate on medium to large memory buffers.
Such applications can be found in the fields of security (data encryption, integrity check,
etc.) and networking.
There are many other fields of application for C3, such as signal processing, image
processing and in general applications that require complex mathematical computations
28.3.1
HIF (High speed bus interface)
This block implements an AMBA AHB 2.0 compliant Master interface. It receives internal
requests from all the C3 internal initiator blocks and it translates them into AHB bus
requests. The HIF is a master only and will not allow access to the C3 internal.
28.3.2
SIF (Slave bus interface)
This block implements an AMBA AHB 2.0 compliant Slave interface. This interface is used to
set-up the device and access all the memory mapped internal registers. Each channel is
allocated a 1K byte address space and the major blocks of the C3 are also allocated space
in the map.
28.3.3
IDS (Instruction dispatchers sub-system)
This block contains the instruction dispatchers (up to 4) that are in charge of fetching the
programs from memory and dispatch the instructions to the requested channels. Since the
instruction dispatchers operate in parallel up to 4 instruction flows can be executed
concurrently.
If programmed to do so the instruction dispatcher signal the end of processing to the host
processor by raising an interrupt signal.
Each Instruction Dispatchers (ID) can handle two types of instructions:
●
Flow Type Instructions: these are C3 control instructions and are executed by the ID
itself
●
Application Specific Instructions: these are processing instructions that are directly
dispatched by the ID to the right channel that will perform decoding and execution.
28.3.4
Channel
A Channel is a specific function or set of similar functions and a wrapper to provide data flow
management, instruction handling and interface to the various parts of C3. Channels
implement the data processing. Total number of channels available in this version of C3 is 3.
Channels operate in parallel and contend the access to the system bus through the HIF
arbitration mechanism. Channels are designed to efficiently support the data-flow model of
computation.



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