RM0319 datasheet(179/368 Pages) STMICROELECTRONICS

179 / 368 page

RM0319

MMC-SD card/SDIO controller

Doc ID 022640 Rev 3

179/368

MMC-SD card/SDIO controller

This chapter describes the features of the MMC/SD/SDIO host controller and provides

programming information.

For technical details about the programmable registers, refer to the MMC/SD/SDIO

controller registers in the following companion document:

●

RM0321: SPEAr320S address map and registers

14.1

Overview

The MMC/SD/SDIO host controller conforms to the SD host controller standard specification

version 2.0. It handles SDIO/SD protocol at transmission level, packing data, adding cyclic

redundancy check (CRC), start/end bit and checking for transaction format correctness. The

host controller provides programmed IO and DMA data transfer method.

14.2

Main features

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Meets SD Host Controller Standard Specification Version 2.0

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Meets SDIO card specification version 2.0

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Meets SD Memory Card Specification Draft version 2.0

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Meets SD Memory Card Security Specification version 1.01

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Meets MMC Specification version 3.31 and 4.2

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Supports both DMA and Non-DMA mode of operation

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Supports MMC Plus and MMC Mobile

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Card Detection (Insertion / Removal)

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Password protection of Cards

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Host clock rate variable between 0 and 48 MHz

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Supports 1-/4-/8-bit SD modes and SPI mode

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Supports multimedia card interrupt mode

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Allows card to interrupt host in 1bit, 4 bit, 8 bit SD modes and SPI mode.

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Up to 100 Mbits per second data rate using 4 parallel data lines (SD4 bit mode)

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Up to 416 Mbits per second data rate using 8 bit parallel data lines (SD8 bit mode)

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Cyclic redundancy check CRC7 for command and CRC16 for data integrity

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Designed to work with I/O cards, read-only cards and read/write cards

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Error correction code (ECC) support for MMC4.2 cards

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Supports read wait control, suspend/resume operation

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Supports FIFO overrun and underrun condition by stopping SD clock

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Conforms to AMBA specification AHB (2.0)

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