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RM0312 bảng dữ liệu(HTML) 201 Page - STMicroelectronics |
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201 / 275 page  DocID022352 Rev 3 201/275 RM0312 Serial peripheral interface (SPI) 223 20 Serial peripheral interface (SPI) 20.1 Introduction The serial peripheral interface (SPI) allows half/ full duplex, synchronous, serial communication with external devices. The interface can be configured as the master and in this case it provides the communication clock (SCK) to the external slave device. The interface is also capable of operating in multi-master configuration. 20.2 SPI main features • Full duplex synchronous transfers (on 3 lines) • Simplex synchronous transfers on 2 lines with or without a bidirectional data line • Master or slave operation • 8 Master mode frequencies (fMASTER/2 max.) • Slave mode frequency (fMASTER/2 max.) • Faster communication - Maximum SPI speed: 8 MHz • NSS management by hardware or software for both master and slave • Programmable clock polarity and phase • Programmable data order with MSB-first or LSB-first shifting • Dedicated transmission and reception flags with interrupt capability • SPI bus busy status flag • Master mode fault and overrun flags with interrupt capability • Wakeup capability: The MCU wakes up from Low power mode in full or half duplex transmit-only modes |
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