RM0312 datasheet(58/275 Pages) STMICROELECTRONICS

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Reset (RST) and voltage detection

RM0312

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DocID022352 Rev 3

An internal temporization maintains a pulse of at least 20 µs for every internal reset source.

An additional internal weak pull-up ensures a high level on the reset pin when the reset is

not forced.

Refer to Figure 11 and see electrical parameters section in the datasheet for more details.

7.2.2

Configuring NRST/PA5 pin as general purpose output

To optimize the number of available pins, the NRST pin (external reset) can be configured

as a general purpose push-pull output (PA5).

For security, this configuration can be performed once only after reset, by writing a specified

key (D0h) to the Reset pin configuration register (RST_CR).

When the PA5 pin is configured as a general purpose output the MCU can be reset only by

a power-on reset (POR) or other internal reset source.

7.3

Internal reset

For internal reset sources, the RESET pin is kept low during the delay phase generated by

the pulse generator.

Each internal reset source is linked to a specific flag bit in the Reset status register

(RST_SR). These flags are set respectively at reset state depending on the given reset

source. So they are used to identify the last reset source. They are cleared by software

writing the logic value “1”.

Note:

All flags besides the POR flag are reset at POR.

7.3.1

Power-on reset (POR)

During power-on, the POR keeps the device under reset until the supply voltage (VDD)

reaches a specified voltage and then holds reset active even longer for a specified time in

order to assure that VDD has reached the minimum operating voltage before releasing the

RESET pin. See electrical parameters section in the datasheet for more details.

7.3.2

Independent watchdog reset

See the independent watchdog section for details.

A reset can be triggered by the application software using the independent watchdog.

7.3.3

SWIM reset

An external device connected to the SWIM interface can request the SWIM block to

generate an MCU reset.

7.3.4

Illegal opcode reset

In order to provide enhanced robustness to the device against unexpected behavior, a

system of illegal opcode detection is implemented. If a code to be executed does not

correspond to any opcode or prebyte value, a reset is generated. This, combined with the

watchdog, allows recovery from an unexpected fault or interference.

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