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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PM0215 bảng dữ liệu(PDF) 88 Page - STMicroelectronics |
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PM0215 bảng dữ liệu(HTML) 88 Page - STMicroelectronics |
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88 / 91 page  Core peripherals PM0215 88/91 Doc ID 022979 Rev 1 4.4.4 SysTick calibration value register (STK_CALIB) Address offset: 0x0C Reset value: 0x0000000 The CALIB register indicates the SysTick calibration properties. If calibration information is not known, calculate the calibration value required from the frequency of the processor clock or external clock. 4.4.5 SysTick design hints and tips The SysTick counter runs on the processor clock. If this clock signal is stopped for low power mode, the SysTick counter stops. Ensure software uses aligned word accesses to access the SysTick registers. The SysTick counter reload and current value are undefined at reset, the correct initialization sequence for the SysTick counter is: 1. Program reload value. 2. Clear current value. 3. Program Control and Status register. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 NO REF SKEW Reserved TENMS[23:16] r r rr rrr r r r 15 14 13 12 11 10 9 8 7 6 5 4321 0 TENMS[15:0] rrr rrr r r r r r r r r r r Bit 31 NOREF: NOREF flag. Reads as one. Indicates that no separate reference clock is provided. Bit 30 SKEW: SKEW flag: Reads as one. Calibration value for the 10ms inexact timing is not known because TENMS is not known. This can affect the suitability of SysTick as a software real time clock. Bits 29:24 Reserved, must be kept cleared. Bits 23:0 TENMS[23:0]: Calibration value. Reads as zero. Indicates calibration value is not known |
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