GMS81C2012 datasheet(60/107 Pages) HYNIX

60 / 107 page

GMS81C2012/GMS81C2020

HYUNDAI MicroElectronics

MAR. 2000 Ver 1.00

If it needed more higher frequency of PWM, it should be

reduced resolution.

The bit POL of TM1 decides the polarity of duty cycle.

If the duty value is set same to the period value, the PWM

output is determined by the bit POL (1: High, 0: Low). And

if the duty value is set to "00H", the PWM output is deter-

mined by the bit POL (1: Low, 0: High).

It can be changed duty value when the PWM output. How-

ever the changed duty value is output after the current pe-

riod is over. And it can be maintained the duty value at

present output when changed only period value shown as

Figure 12-14. As it were, the absolute duty time is not

changed in varying frequency. But the changed period val-

ue must greater than the duty value.

Figure 12-12 PWM Mode

Resolution

Frequency

T1CK[1:0]

= 00(250nS)

T1CK[1:0]

= 01(500nS)

T1CK[1:0]

= 10(2uS)

10-bit

3.9KHz

0.98KHZ

0.49KHZ

9-bit

7.8KHz

1.95KHz

0.97KHz

8-bit

15.6KHz

3.90KHz

1.95KHz

7-bit

31.2KHz

7.81KHz

3.90KHz

Table 12-2 PWM Frequency vs. Resolution at 4MHz

÷ 1

÷ 2

÷ 8

PWM1HR

ADDRESS : D5H

RESET VALUE : ----0000

PWM1HR3PWM1HR2PWM1HR1PWM1HR0

---

XXX

MUX

T1CN

T1CK[1:0]

T1 ( 8-bit )

T1ST

0 : Stop

1 : Clear and Start

CLEAR

COMPARATOR

T1PDR(8-bit)

PWM1HR[1:0]

T1PPR(8-bit)

PWM1HR[3:2]

T1PDR(8-bit)

POL

PWM1O

R56/

PWM1O/T1O

T0 clock source

fXI

TM1

ADDRESS : D2H

RESET VALUE : 00000000

POL

16BIT

PWM1E

CAP1

T1CK1

T1CK0

T1CN

T1ST

010

XXX

[R5FUNC.6]

Period High

Duty High

Slave

Master

Bit Manipulation Not Available

X : The value "0" or "1" corresponding your operation.

[T0CK]

(2-bit)

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