GMS81C2012 datasheet(53/107 Pages) HYNIX

53 / 107 page

HYUNDAI MicroElectronics

GMS81C2012/GMS81C2020

MAR. 2000 Ver 1.00

8-bit Event Counter Mode

In this mode, counting up is started by an external trigger.

This trigger means falling edge or rising edge of the EC0

pin input. Source clock is used as an internal clock selected

with timer mode register TM0. The contents of timer data

counter T0. If a match is found, an timer interrupt request

flag T0IF is generated, and the counter is cleared to “0”.

The counter is restart and count up continuously by every

falling edge or rising edge of the EC0 pin input.

The maximum frequency applied to the EC0 pin is fXIN/2

[Hz].

In order to use event counter function, the bit 2 of the R5

function register (R5FUNC.2) is required to be set to “1”.

After reset, the value of timer data register TDR0 is unde-

fined, it should be initialized to between 1H~FFHnot to

"0"The interval period of Timer is calculated as below

equation.

Figure 12-5 Event Counter Mode Timing Chart

Figure 12-6 Count Operation of Timer / Event counter

Period (sec)

XIN

-----------

Divide Ratio

TDR0

n-1

ECn pin input

Up-counter

TDR1

T1IF interrupt

Start count

Timer 1 (T1IF)

Interrupt

TDR1

TIME

Occur interrupt

stop

clear & start

disable

enable

Start & Stop

T1ST

T1CN

Control count

T1ST = 0

T1ST = 1

T1CN = 0

T1CN = 1

GMS81C2012 bảng dữ liệu(PDF) 53 Page - Hynix Semiconductor

GMS81C2012 bảng dữ liệu(HTML) 53 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL