ACT5880 datasheet(54/87 Pages) ACTIVE-SEMI

54 / 87 page

ACT5880

Rev 2, 03-Sep-13

- 54 -

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TSC ADC ELECTRICAL CHARACTERISTICS

(VVBAT = VVD = 3.6V, TA = 25°C, unless otherwise specified.)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Operation Voltage Range

VVD

2.9

5.5

Reference Voltage (VREF)

TA = -40°C to +85°C

2.5

Maximum Available Resolution

CLEN=0

bits

Full Scale Dynamic Range at

Input (FSDRNOTE1)

XPOS, YPOS, XNEG, YNEG, AUX0, AUX1, AUX2.

VREF

AUX3

6.024

Absolute DC Conversion Error

AUX3, measured with VVBAT=3.9V.

-21

TSC Conversion Time

(

Counts of internal clock cycles

of the device)

CLEN=0(for 12 bits resolution), Switch frequency

2MHz.

225

μs

INLNOTE2

The standard deviation plus the 1st movement of the

worst. INL and DNL are from DC sweep histogram

analysis; Offset and Gain Error are from least square

linear approximation, from data of input in 10% to 90%

FSDR; Effective Numbers of Bits is the worst

FWHMNOTE3 of reading a DC volume in same range.

Test on channel 0 to channel 6 only, 12 bits

conversion.

-4

DNLNOTE2

-1

OffsetNOTE2

Gain ErrorNOTE2

1.5

Effective Numbers of BitsNOTE2

bit

Input Impedance

MΩ

Input capacitance

Input leakage Current

0.1

μA

Touch Detection Trap

Thresholds

Voltage at the XPOS when pen touch trapped.

Force Current

At force driving voltage drop 5%.

Force Switch On-Impedance

Ω

Conversion Operation Current

210

μA

Shutdown Current

LSB

Note: Guaranteed by design verification, characterization and production process control.

NOTE1: DC Full Scale Dynamic Range at input.

NOTE2: Guaranted by design verfication, characterization and production process control.

NOTE3: Full Width of Half Magnititude.

See The TYPICAL PERFORMANCE CHARACTERISTICS for:

The DC Sweep Histogram DNL

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